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PDF MAX3946 Data sheet ( Hoja de datos )
| Número de pieza | MAX3946 | |
| Descripción | SFP+ Laser Driver With Laser Impedance Mismatch | |
| Fabricantes | Maxim Integrated Products | |
| Logotipo |  |
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19-5182; Rev 0; 3/10
EVAALVUAAILTAIOBNLEKIT
www.DataSheet4U.com
1.0625Gbps to 11.3Gbps, SFP+ Laser Driver
with Laser Impedance Mismatch Tolerance
General Description
The MAX3946 is a +3.3V, multirate, low-power laser
diode driver designed for Ethernet and Fibre Channel
transmission systems at data rates up to 11.3Gbps.
This device is optimized to drive a differential transmit-
ter optical subassembly (TOSA) with a 25I flex circuit.
The unique design of the output stage enables use of
unmatched TOSAs, greatly reducing headroom limita-
tions and lowering power consumption.
The device receives differential CML-compatible signals
with on-chip line termination. It can deliver laser modula-
tion current of up to 80mA, at an edge speed of 20ps
(20% to 80%), into a 5I to 25I external differential load.
The device is designed to have a symmetrical output
stage with on-chip back terminations integrated into
its outputs. A high-bandwidth, fully differential signal
path is implemented to minimize deterministic jitter. An
equalization block can be activated to compensate for
the SFP+ connector. The integrated bias circuit provides
programmable laser bias current up to 80mA. Both the
laser bias generator and the laser modulator can be dis-
abled from a single pin, DISABLE.
A 3-wire digital interface reduces the pin count and
permits adjustment of input equalization, pulse-width
adjustment, Tx polarity, Tx deemphasis, modulation cur-
rent, and bias current without the need for external com-
ponents. The MAX3946 is available in a 4mm x 4mm,
24-pin TQFN package.
Applications
4x/8x FC SFP+ Optical Transceivers
10GFC SFP+ Optical Transceivers
10GBASE-LR SFP+ Optical Transceivers
10GBASE-LRM SFP+ Optical Transceivers
OC192-SR XFP/SFP+ Transceivers
Features
S 225mW Power Dissipation Enables < 1W SFP+
Modules
S Up to 100mW Power Consumption Reduction by
Enabling the Use of Unmatched FP/DFB TOSAs
S Supports SFF-8431 SFP+ MSA and SFF-8472
Digital Diagnostic
S 225mW Power Dissipation at 3.3V (IMOD = 40mA,
IBIAS = 60mA Assuming 25I TOSA)
S Single +3.3V Power Supply
S Up to 11.3Gbps (NRZ) Operation
S Programmable Modulation Current from 10mA to
100mA (5I Load)
S Programmable Bias Current from 5mA to 80mA
S Programmable Input Equalization
S Programmable Output Deemphasis
S 25I Output Back Termination at TOUT+ and
TOUT-
S DJ Performance 7psP-P with Mismatched
Differential Load (5I)
S DJ Performance 5psP-P with Mismatched
Differential Load (25I)
S DJ Performance 5psP-P with 50I Differential Load
S Programmable Pulse Width
S Edge Transition Times of 20ps
S Bias Current Monitor
S Integrated Eye Safety Features
S 3-Wire Digital Interface
S -40°C to +95°C Operation
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
MAX3946ETG+
-40°C to +85°C
24 TQFN-EP*
Note: Parts are guaranteed by design and characterization to
operate over the -40°C to +95°C ambient temperature range
(TA) and are tested up to +85°C.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1 page  
www.DataSheet4U.com
1.0625Gbps to 11.3Gbps, SFP+ Laser Driver
with Laser Impedance Mismatch Tolerance
ELECTRICAL CHARACTERISTICS (continued)
(VCC = +2.85V to +3.63V, TA = -40°C to +85°C, and Figure 1. Guaranteed by design and characterization from TA = -40°C to +95°C.
Typical values are at VCC = +3.3V, IBIAS = 60mA, IMOD = 40mA, 25I differential output load, and TA = +25°C, unless otherwise
noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
DISABLE Input Resistance
RPULL Internal pullup resistor
3-WIRE DIGITAL I/O SPECIFICATIONS (SDA, SCL, CSEL)
Input High Voltage
VIH
Input Low Voltage
VIL
Input Hysteresis
VHYST
Input Leakage Current
IIL, IIH
VIN = 0V or VCC, internal pullup or pull-
down is 75kI typical
Output High Voltage
VOH External pullup is (4.7kI to 10kI) to VCC
Output Low Voltage
VOL External pullup is (4.7kI to 10kI) to VCC
3-WIRE DIGITAL INTERFACE TIMING CHARACTERISTICS (Figure 5)
SCL Clock Frequency
fSCL
SCL Pulse-Width High
tCH
SCL Pulse-Width Low
tCL
SDA Setup Time
tDS
SDA Hold Time
tDH
SCL Rise to SDA Propagation
Time
tD
CSEL Pulse-Width Low
CSEL Leading Time Before the
First SCL Edge
tCSW
tL
CSEL Trailing Time After the Last
SCL Edge
tT
SDA, SCL Load
CB
Total bus capacitance on one line with
4.7kI pullup to VCC
MIN TYP
4.7 7.5
2.0
80
VCC - 0.5
400
0.5
0.5
100
100
5
500
500
500
MAX
10
UNITS
kI
VCC
V
0.8 V
mV
150 FA
V
0.4 V
1000
kHz
Fs
Fs
ns
ns
ns
ns
ns
ns
20 pF
Note 1: Guaranteed by design and characterization (TA = -40NC to +95NC).
Note 2: BIAS is connected to 2.0V. TOUT+/TOUT- are connected through pullup inductors to a separate supply that is equal to VCCT.
ICC = 4.92 + 0.0383 x IBIAS + 0.3692 x IMOD
Note 3: Stability is defined as [(I_measured) - (I_reference)]/(I_reference) over the listed current range, temperature, and VCC =
VCCREF Q5%. VCCREF = 3.0V to 3.45V. Reference current measured at VCCREF, TA = +25NC.
Note 4: Measured with K28.5 data pattern at 10.7Gbps and with a (27 - 1 PRBS + 72 zeros + 27 - 1 PRBS (inverted) + 72 ones)
pattern at 11.3Gbps.
_______________________________________________________________________________________ 5
5 Page 
www.DataSheet4U.com
1.0625Gbps to 11.3Gbps, SFP+ Laser Driver
with Laser Impedance Mismatch Tolerance
PIN
18
19, 24
20, 23
21
22
—
NAME
SCL
VEET
VCC
TIN+
TIN-
EP
Pin Description (continued)
FUNCTION
Serial-Clock Input, CMOS. This pin has 75kI internal pulldown.
Ground
Power-Supply Connections. Provides supply voltage to the core circuitry.
Noninverted Data Input
Inverted Data Input
Exposed Pad. Ground. Must be soldered to circuit board ground for proper thermal and electrical
performance (see the Exposed-Pad Package and Thermal Considerations section).
DISABLE
FAULT
BMAX
VCCD
7.5kI
TX_EN
VCM
50I
TIN+
TIN-
50I TX_POL
1
EQ
0
EYE SAFETY AND
OUTPUT CONTROL
LASER BIAS
CURRENT LIMITER
POWER-ON RESET
PW
CONTROL
SDA
SCL
CSEL
VCCD
75kI
CONTROL
LOGIC
3-WIRE
INTERFACE
REGISTER
75kI
75kI
SET_TXEQ
SET_PWCTRL
9b DAC SET_IMOD
6b DAC SET_TXDE
9b DAC SET_IBIAS
IMOD_DAC + IDE_DAC
25I
25I
IBIAS
IBIAS
VCC 100
TOUT+
VCCT
TOUT-
BIAS
BMON
MAX3946
Figure 2. Functional Diagram
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet MAX3946.PDF ] | |
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