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PDF PCA8534A Data sheet ( Hoja de datos )
| Número de pieza | PCA8534A | |
| Descripción | Universal LCD Driver For Low Multiplex Rates | |
| Fabricantes | NXP Semiconductors | |
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PCA8534A
Universal LCD driver for low multiplex rates
Rev. 01 — 15 April 2010
Product data sheet
1. General description
The PCA8534A is a peripheral device which interfaces to almost any Liquid Crystal
Display (LCD)1 with low multiplex rates. It generates the drive signals for any static or
multiplexed LCD containing up to four backplanes and up to 60 segments. It can be easily
cascaded for larger LCD applications. The PCA8534A is compatible with most
microprocessors or microcontrollers and communicates via a two-line bidirectional
I2C-bus. Communication overheads are minimized by a display RAM with
auto-incremented addressing, by hardware subaddressing, and by display memory
switching (static and duplex drive modes).
AEC-Q100 compliant for automotive applications.
2. Features and benefits
Single-chip LCD controller and driver
Selectable backplane drive configurations: static, 2, 3, or 4 backplane multiplexing
60 segment outputs allowing to drive:
30 7-segment alphanumeric characters
16 14-segment alphanumeric characters
Any graphics of up to 240 elements
Cascading supported for larger applications
60 × 4-bit display data storage RAM
Wide LCD supply range: from 2.5 V for low threshold LCDs up to 6.5 V for guest-host
LCDs and high threshold (automobile) twisted nematic LCDs
Internal LCD bias generation with voltage follower buffers
Selectable display bias configurations: static, 1⁄2, or 1⁄3
Wide logic power supply range: from 1.8 V to 5.5 V
LCD and logic supplies may be separated
Low power consumption
400 kHz I2C-bus interface
Compatible with any microprocessors or microcontrollers
No external components
Display memory bank switching in static and duplex drive modes
Auto-incremented display data loading
Versatile blinking modes
Silicon gate CMOS process
1. The definition of the abbreviations and acronyms used in this data sheet can be found in Section 16.
1 page  
NXP Semiconductors
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PCA8534A
Universal LCD driver for low multiplex rates
6.2 Pin description
Table 3. Pin description
Symbol
Pin
Type
S31 to S59 1 to 29 output
BP0 to BP3 30 to 33 output
n.c. 34 to 37 -
SDA
SCL
CLK
VDD
SYNC
OSC
A0 to A2
SA0
VSS
VLCD
S0 to S30
38 input/output
39 input
40 input/output
41 supply
42 input/output
43 input
44 to 46 input
47 input
48 supply
49 input
50 to 80 output
Description
LCD segment output 31 to 59
LCD backplane output 0 to 3
not connected; do not connect and do not use as feed
through
I2C-bus serial data input and output
I2C-bus serial clock input
external clock input and internal clock output
supply voltage
cascade synchronization input and output (active LOW)
enable input for internal oscillator
subaddress counter input 0 to 2
I2C-bus slave address input 0
ground supply voltage
LCD supply voltage
LCD segment output 0 to 30
PCA8534A_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 15 April 2010
© NXP B.V. 2010. All rights reserved.
5 of 44
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NXP Semiconductors
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PCA8534A
Universal LCD driver for low multiplex rates
BP0
BP1
Sn
Sn+1
state 1
state 2
VLCD
2VLCD / 3
VLCD / 3
VSS
VLCD
2VLCD / 3
VLCD / 3
VSS
VLCD
2VLCD / 3
VLCD / 3
VSS
VLCD
2VLCD / 3
VLCD / 3
VSS
VLCD
2VLCD / 3
VLCD / 3
0V
−VLCD / 3
−2VLCD / 3
−VLCD
VLCD
2VLCD / 3
VLCD / 3
0V
−VLCD / 3
−2VLCD / 3
−VLCD
Tfr
LCD segments
state 1
state 2
(a) Waveforms at driver.
(b) Resultant waveforms
at LCD segment.
mgl747
Fig 6.
Vstate1(t) = VSn(t) − VBP0(t).
Von(RMS) = 0.745VLCD.
Vstate2(t) = VSn(t) − VBP1(t).
Voff(RMS) = 0.333VLCD.
Waveforms for the 1:2 multiplex drive mode with 1⁄3 bias
PCA8534A_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 15 April 2010
© NXP B.V. 2010. All rights reserved.
11 of 44
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet PCA8534A.PDF ] | |
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