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PDF AD5748 Data sheet ( Hoja de datos )
| Número de pieza | AD5748 | |
| Descripción | Industrial Current/Voltage Output Driver | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Industrial Current/Voltage Output Driverwww.DataSheet4U.com
with Programmable Ranges
AD5748
FEATURES
Current output ranges: 4 mA to 21 mA, 0 mA to 21 mA
±0.15% FSR total unadjusted error (TUE)
±5 ppm/°C FSR typical output drift
Voltage output ranges: 0 V to 5 V, 0 V to 10.5 V, ±10.5 V
±0.05% FSR total unadjusted error (TUE)
±3 ppm/°C FSR output drift
Flexible serial digital interface
On-chip output fault detection
PEC error checking
Asynchronous CLEAR function
Flexible power-up condition to 0 V or tristate
Power supply range
AVDD: +12 V (± 10%) to +24 V (± 10%)
AVSS: −12 V (± 10%) to −24 V (± 10%)
Output loop compliance to AVDD − 2.75 V
Temperature range: −40°C to +105°C
32-lead, 5 mm × 5 mm LFCSP package
APPLICATIONS
Process control
Actuator control
PLCs
GENERAL DESCRIPTION
The AD5748 is a single-channel, low cost, precision, voltage/
current output driver with hardware or software programmable
output ranges. The software ranges are configured via an SPI-/
MICROWIRE™-compatible serial interface. The AD5748 targets
applications in PLC and industrial process control. The analog
input to the AD5748 is provided from a low voltage, single-supply,
digital-to-analog converter (DAC) and is internally conditioned
to provide the desired output current/voltage range. The analog
input range is 0 V to 4.096 V.
The output current range is programmable across two current
ranges: 4 mA to 21 mA and 0 mA to 21 mA.
Voltage output is provided from a separate pin that can be
configured to provide 0 V to 5 V, 0 V to 10.5 V, or ±10.5 V
output range.
Analog outputs are short-circuit and open-circuit protected and
can drive capacitive loads of 2 μF and inductive loads of 0.1 H.
The device is specified to operate with a power supply range from
±12 V to ±24 V. Output loop compliance is 0 V to AVDD − 2.75 V.
The flexible serial interface is SPI- and MICROWIRE-compatible
and can be operated in 3-wire mode to minimize the digital
isolation required in isolated applications. The interface also
features an optional PEC error checking feature using CRC-8
error checking, useful in industrial environments where data
communication corruption can occur.
The device also includes a power-on-reset function, ensuring
that the device powers up in a known state (0 V or tristate),
and a asynchronous CLEAR pin that sets the outputs to zero
scale/midscale voltage output or the low end of the selected
current range.
An HW SELECT pin is used to configure the part for hardware
or software mode on power-up.
Note that the plots in the Typical Performance Characteristics
section of this data sheet contain information on the standard
ranges, as released in the AD5750/AD5750-1 data sheet. Although
the overranges have been tested, new plots were not generated
and substitution data was used for plotting purposes.
Table 1. Related Device
Part Number Description
AD5422
Single-channel, 16-bit, serial input current
source and voltage output DAC
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2010 Analog Devices, Inc. All rights reserved.
1 page  
Parameter1
Output Noise Spectral Density
AC PSRR
DC PSRR
CURRENT OUTPUT, IOUT
Output Current Ranges
Accuracy, Internal RSET4
Total Unadjusted Error (TUE)2
Relative Accuracy (INL)
Offset Error
Offset Error TC3
Gain Error
Gain TC3
Full-Scale Error
Full-Scale TC3
Accuracy, External RSET4
Total Unadjusted Error (TUE)2
Relative Accuracy (INL)
Offset Error
Offset Error TC3
Gain Error
Gain TC
Full-Scale Error
Full-Scale TC3
CURRENT OUTPUT CHARACTERISTICS3
Current Loop Compliance Voltage
Resistive Load
Inductive Load
Min
0
4
−0.5
−0.3
−0.02
−16
−10
−0.2
−0.03
−0.2
−0.125
−0.3
−0.1
−0.02
−14
−11
−0.08
−0.07
−0.1
−0.07
0
Settling Time
4 mA to 21 mA, Full-Scale Step
120 μA Step, 4 mA to 21 mA Range
DC PSRR
Output Impedance
DIGITAL INPUT
Input High Voltage, VIH
Input Low Voltage, VIL
Input Current
Pin Capacitance
DIGITAL OUTPUTS3
FAULT, IFAULT, TEMP, VFAULT
Output Low Voltage, VOL
Output Low Voltage, VOL
Output High Voltage, VOH
2
−1
3.6
AD5748www.DataSheet4U.com
Typ Max Unit
Test Conditions/Comments
165
nV/√Hz
Measured at 10 kHz; specified with
2 kΩ || 220 pF
−65 dB 200 mV, 50 Hz/60 Hz sine wave
superimposed on power supply voltage
10
μV/V
Outputs unloaded
21 mA
21 mA
±0.15
±0.01
+5
±3
±0.006
±8
±0.02
±4
+0.5
+0.3
+0.02
+16
+10
+0.2
+0.03
+0.2
+0.125
% FSR
% FSR
% FSR
μA
μA
ppm FSR/°C
% FSR
% FSR
ppm FSR/°C
% FSR
% FSR
ppm FSR/°C
TA = 25°C
4 mA to 21 mA, 0 mA to 21 mA
4 mA to 21 mA, 0 mA to 21 mA
TA = 25°C
4 mA to 21 mA, 0 mA to 21 mA
4 mA to 21 mA, 0 mA to 21 mA
TA = 25°C
4 mA to 21 mA, 0 mA to 21 mA
4 mA to 21 mA, 0 mA to 21 mA
TA = 25°C
4 mA to 21 mA, 0 mA to 21 mA
±0.02
±0.01
+5
±2
±0.02
±1
±0.02
±2
+0.3
+0.1
+0.02
+14
+11
+0.08
+0.07
+0.1
+0.07
% FSR
% FSR
% FSR
μA
μA
ppm FSR/°C
% FSR
% FSR
ppm FSR/°C
% FSR
% FSR
ppm FSR/°C
TA = 25°C
4 mA to 21 mA, 0 mA to 21 mA
4 mA to 21 mA, 0 mA to 21 mA
TA = 25°C
4 mA to 21 mA, 0 mA to 21 mA
4 mA to 21 mA, 0 mA to 21 mA
TA = 25°C
4 mA to 21 mA, 0 mA to 21 mA
4 mA to 21 mA, 0 mA to 21 mA
TA = 25°C
4 mA to 21 mA, 0 mA to 21 mA
AVDD − 2.75 V
See comments
See comments
Chosen so that compliance is not
exceeded
Needs appropriate capacitor at higher
inductance values; see the Driving
Inductive Loads section
8.5
1.2 Ą
1
130
0.8
+1
5
μs
μs
μA/V
MΩ
V
V
μA
pF
250 Ω load
250 Ω load
JEDEC compliant
Per pin
Per pin
0.4
0.6
Rev. 0 | Page 5 of 32
V
V
V
10 kΩ pull-up resistor to DVCC
At 2.5 mA
10 kΩ pull-up resistor to DVCC
5 Page 
AD5748www.DataSheet4U.com
Pin No.
11
12, 13
14
15
16
17
18
19, 20
21
22
23
24
25, 26,
27, 28
29
30
31
32
33 (EPAD)
Mnemonic
AD0/R3
REXT2, REXT1
VREF
VIN
GND
AVDD
IOUT
COMP2,
COMP1
AVSS
VSENSE−
VOUT
VSENSE+
NC
HW SELECT
RESET
FAULT/TEMP
NC/IFAULT
Exposed
paddle
Description
Device Addressing Bit (AD0). In software mode, this pin, in conjunction with AD1 and AD2, allows up to eight
devices to be addressed on one bus.
Range Decode Bit (R3). In hardware mode, this pin, in conjunction with, R0, R1, and R2, selects the output
current/voltage range setting on the part.
A 15 kΩ external current setting resistor can be connected between the REXT1 and REXT2 pins to improve the
IOUT temperature drift performance.
Buffered Reference Input.
Buffered Analog Input (0 V to 4.096 V).
Ground Connection.
Positive Analog Supply Pin.
Current Output Pin.
Optional Compensation Capacitor Connections for the Voltage Output Buffer. These are used to drive higher
capacitive loads on the output. These pins also reduce overshoot on the output. Care should be taken when
choosing the value of the capacitor connected between the COMP1 and COMP2 pins because it has a direct
influence on the settling time of the output. See the Driving Large Capacitive Loads section for further details.
Negative Analog Supply Pin.
Sense Connection for the Negative Voltage Output Load Connection. This pin must stay within ±3.0 V of
ground for correct operation.
Buffered Analog Output Voltage.
Sense Connection for the Positive Voltage Output Load Connection.
No Connect. Can be tied to GND.
This pin is used to configure the part to hardware or software mode.
HW SELECT = 0 selects software control.
HW SELECT = 1 selects hardware control.
Resets the part to its power-on state.
Fault Alert (FAULT). In software mode, this pin acts as a general fault alert pin. It is asserted low when an open
circuit, short circuit, overtemperature error, or PEC interface error is detected. This pin is an open-drain output
and must be connected to a pull-up resistor.
Overtemperature Fault (TEMP). In hardware mode, this pin acts as an overtemperature fault pin. It is asserted
low when an overtemperature error is detected. This pin is an open-drain output and must be connected to a
pull-up resistor.
No Connect (NC). In software mode, this pin is a no connect. Instead, tie this pin to GND.
Open-Circuit Fault Alert (IFAULT). In hardware mode, this pin acts as an open-circuit fault alert pin. It is asserted
low when an open-circuit error is detected. This pin is an open-drain output and must be connected to a pull-
up resistor.
The exposed paddle is tied to AVSS.
Rev. 0 | Page 11 of 32
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AD5748.PDF ] | |
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