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PDF NCV7729 Data sheet ( Hoja de datos )
| Número de pieza | NCV7729 | |
| Descripción | 8A H-Bridge Driver | |
| Fabricantes | ON Semiconductor | |
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NCV7729
www.DataSheet4U.com
8A H-Bridge Driver
The NCV7729 is an intelligent, fully protected H−Bridge Driver
designed specifically for control of DC and stepper motors in safety
critical applications under automotive/industrial environment.
Features
• Operating VS Battery Supply Voltage 5 V to 28 V
• Operating VCC Supply Voltage 3.0 to 5.5 V
• 18 V Survivability on VCC and All Logic I/O Pins
• Typical RDS(on) = 150 mW, RDS(MAX) = 300 mW (150°C)
• Continuous DC Load Current 5A (TC < 100°C)
• Selectable Output Current Limitation (2.5 A to 9.6 A)
• Output Switching Frequency Up to 30 kHz
• Monitoring of All Supply Voltages, Safe Power−up State
• Loss of GND Detection
• Short−Circuit Protection and Thermal Shutdown
• Full Diagnosis Capability for Open Load, Short to GND/VS and
Shorted Load Conditions
• SPI Interface for Configuration and Diagnosis
• Undervoltage Lockout
• Regulated Charge Pump for Optimized EMI Behavior
• This is a Pb−Free Device
• NCV Prefix for Automotive and Other Applications Requiring Site
and Change Controls
Typical Applications
• Automotive
♦ Electronic Throttle Control (ETC)
♦ Variable Intake Geometry
♦ Exhaust Gas Recirculation
♦ Variable Swirl
♦ Blow−off Flap
• Industrial
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PSOP−20
CASE 525AB
MARKING DIAGRAM
20 11
NCV7729BG
AWLYYWWG
1 10
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
ORDERING INFORMATION
Device
Package
Shipping†
NCV7729BPPR2G PSOP−20
(Pb−Free)
750 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2010
April, 2010 − Rev. 0
1
Publication Order Number:
NCV7729/D
1 page  
NCV7729
MAXIMUM RATINGS (Voltages are with respect to device substrate.)
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Rating
Value
Unit
Battery Supply and Power Outputs (VS, OUTx)
(DC)
(AC), t < 500 ms
−1 to 40
−2
V
Digital Supply (VCC),
Logic input/output pins (EN, DIS/SF, INx, CSB,SCLK, SO, SI)
−0.5 to 18
V
Charge pump Supply, relative to VS V(CHP) − V(VS)
16 V
Operating Junction Temperature
Continuous
t<1s
−40 to 150
175
°C
Storage Temperature Range
−65 to 150
°C
Peak Reflow Soldering Temperature: Pb−Free − 60 to 150 seconds at 217°C (Note 1)
260 peak
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. For additional information, see or download ON Semiconductor’s Soldering and Mounting Techniques Reference Manual, SOLDERRM/D,
and Application Note AND8003/D.
ATTRIBUTES
Characteristic
Value
Unit
Electrostatic Discharge, Human Body Model (MIL Std 883D)
All pins
Battery / Output Pins (VS, OUTx) (Note 3)
w $2
w $8
kV
Electrostatic Discharge, CDM
w $800
V
Moisture Sensitivity Level (Note 2)
MSL 1
−
Thermal Resistances
Junction − to − ambient (copper area, thickness)
Theta JA ( 100 mm2, 2 oz ) (Note 4)
Theta JA ( 300 mm2, 2 oz ) (Note 4)
Theta JA ( 600 mm2, 2 oz ) (Note 4)
Psi J−Board solder pad
°C/W
78
47
36
1.5
Package Thermal Time Constant
1 sec
2. For additional information, see or download ON Semiconductor’s Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D, and Application Note AND8003/D.
3. VS pins (pin 5, 16) connected together; all GND pins (pin 1, 10, 11, 20) connected together.
4. Thermal estimates are based on mounting the package on a 30 x 70 x 1.5 mm FR4 substrate.
Copper areas include traces and mounting area of the device. 1 oz is equivalent to 0.035 mm thick
copper. Test/simulation is based on JEDEC JESD51.1, JESD51.2, and JESD51.3 standards still
air chamber boundary conditions steady state thermal performance.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCCop
VSop
fophi
foplo
Digital supply input voltage (VCC)
Battery supply input voltage (VS)
INx PWM Frequency (CBUF = 22 nF)
Charge pump in full power mode
Charge pump in reduced power mode
TJ Junction temperature
TJac Junction temperature − transient ( t < 1s)
Min Max Unit
3 5.5 V
5 28 V
kHz
− 30
4
−40 150 °C
175 °C
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5
5 Page 
VCC
DIS/SF
NCV7729
VCC
SPI: Config.ENx
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OUTxH
H = HS driver ON
EN
OUTxL
INx H = LS driver ON
RESET_DIAG
RR
VCC POR
QS
VS UNDERVOLTAGE
CHP UNDERVOLTAGE
SPI: Config.SFMODE
Figure 5. Bridge Control Logic
OVERTEMP
OVERCURRENT
Bridge Outputs
The H−Bridge output is built up by four N−channel power
DMOS devices (150 mW typ, 300 mW max @ 150°C). All
transistors are protected against overcurrent and
overtemperature conditions induced by short circuit
conditions to GND, VS, or across the load. Positive and
negative voltage transients that occur during switching
events of inductive loads are clamped by integrated
freewheeling diodes. An integrated regulated chargepump is
provided to drive the gates of the high−side DMOS
transistors.
Output Protection
To prevent device destruction in case of external fault
conditions (OUTx shorted to GND/VS or shorted load), all
four output stages provide overcurrent shutdown and
overtemperature shutdown functionality.
Low−side Current Limitation and Overcurrent
Shutdown
To minimize the power dissipation in case of current
limitation, a peak value control principle (Figure 6) is
integrated in each LS power stage. The current limitation
level Ic can be programmed by SPI (Config.OCx). The
high−side and low−side ISD overcurrent levels are designed
to track the programmed Ic level. When the current limit Ic
is exceeded for a time tb, the affected low side stage is
switched off, the corresponding high side stage is switched
on for a fixed time ta, and the diagnostic register bit “CLIM”
will be latched to indicate peak current limitation active. The
status flag (Config.SFMODE = 1) is not set in this case.
If the overcurrent shutdown threshold ISD is exceeded for
t > tdfault during the blanking time tb (Figure 7), a
short−to−VScondition is detected and the device transitions
into the fault lockout state. All output transistors will be
latched off, the status flag will be set and latched
(Config.SFMODE = 1), and diagnostic register bits “Short
circuit to VS” will be latched to indicate the fault condition.
High−side Overcurrent Shutdown
Both HS transistors are protected against shorted outputs
to GND by an individual overcurrent shutdown. The
high−side and low−side ISD overcurrent levels are designed
to track the programmed Ic level. If the overcurrent
shutdown threshold ISD is exceeded for t > tdfault
(Figure 7), a short−to−GND condition is detected and the
device transitions into the fault lockout state. All output
transistors will be latched off, the status flag will be set and
latched (Config.SFMODE = 1), and diagnostic register bits
“Short circuit to GND” will be latched to indicate the fault
condition.
Shorted Load
In case of a shorted load, both active HS and LS stages
indicate an overcurrent condition. (LS: current limitation
level exceeded, HS: overcurrent shutdown threshold level
exceeded). All output transistors will be latched off, the
status flag will be set and latched (Config.SFMODE = 1),
and diagnostic register bits “Short circuit overload” will be
latched to indicate the fault condition.
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| Páginas | Total 26 Páginas | |
| PDF Descargar | [ Datasheet NCV7729.PDF ] | |
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