|
|
PDF PCA85132 Data sheet ( Hoja de datos )
| Número de pieza | PCA85132 | |
| Descripción | LCD driver for low multiplex rates | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de PCA85132 (archivo pdf) en la parte inferior de esta página. Total 53 Páginas | ||
|
No Preview Available !
PCA85132
LCD driver for low multiplex rates
Rev. 01 — 6 May 2010
www.DataSheet4U.com
Product data sheet
1. General description
The PCA85132 is a peripheral device which interfaces to almost any Liquid Crystal
Display (LCD)1 with low multiplex rates. It generates the drive signals for any static or
multiplexed LCD containing up to four backplanes and up to 160 segments. It can be
easily cascaded for larger LCD applications. The PCA85132 is compatible with most
microprocessors or microcontrollers and communicates via a two-line bidirectional
I2C-bus. Communication overheads are minimized by a display RAM with
auto-incremented addressing, by hardware subaddressing, and by display memory
switching (static and duplex drive modes).
AEC-Q100 compliant for automotive applications.
2. Features and benefits
Single-chip LCD controller and driver for up to 640 elements
Selectable backplane drive configuration: static, 2, 3, or 4 backplane multiplexing
160 segment drives:
Up to eighty 7-segment numeric characters
Up to forty 14-segment alphanumeric characters
Any graphics of up to 640 elements
May be cascaded for large LCD applications (up to 5120 elements possible)
160 × 4-bit RAM for display data storage
Software programmable frame frequency in steps of 5 Hz in the range of 60 Hz to
90 Hz; factory calibrated
Wide LCD supply range: from 1.8 V for low threshold LCDs and up to 8.0 V for
guest-host LCDs and high threshold (automobile) twisted nematic LCDs
Internal LCD bias generation with voltage-follower buffers
Selectable display bias configuration: static, 1⁄2, or 1⁄3
Wide power supply range: from 1.8 V to 5.5 V
LCD and logic supplies may be separated
Low power consumption, typical: IDD = 4 μA, IDD(LCD) = 30 μA
400 kHz I2C-bus interface
Auto-incremental display data loading across device subaddress boundaries
Versatile blinking modes
Compatible with Chip-On-Glass (COG) technology
No external components
Two sets of backplane outputs for optimal COG configurations of the application
1. The definition of the abbreviations and acronyms used in this data sheet can be found in Section 15.
1 page  
NXP Semiconductors
www.DataSheet4U.com
PCA85132
LCD driver for low multiplex rates
6.2 Pin description
Table 3. Pin description
Symbol
Pin
SDAACK[1]
1 to 3
SDA[1]
4 to 6
SCL 7 to 9
CLK 10
VDD
SYNC
11 to 13
14
OSC
15
T1, T2 and T3
16, 17 and 18 to 20
A0 and A1
SA0
VSS[2]
VLCD
BP2 and BP0
S0 to S79
BP0, BP2, BP1, and BP3
S80 to S159
BP3 and BP1
21, 22
23
24 to 26
27 to 29
30, 31
32 to 111
112 to 115
116 to 195
196, 197
Description
I2C-bus acknowledge output
I2C-bus serial data input
I2C-bus serial clock input
clock input and output
supply voltage
cascade synchronization input and output
selection of internal or external clock
dedicated testing pins; to be tied to VSS in
application mode
subaddress inputs
I2C-bus slave address input
ground supply voltage
LCD supply voltage
LCD backplane outputs
LCD segment outputs
LCD backplane outputs
LCD segment outputs
LCD backplane outputs
[1] For most applications SDA and SDAACK are shorted together (see Section 12.2).
[2] The substrate (rear side of the die) is wired to VSS but should not be electrically contacted.
PCA85132_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 6 May 2010
© NXP B.V. 2010. All rights reserved.
5 of 53
5 Page 
NXP Semiconductors
www.DataSheet4U.com
PCA85132
LCD driver for low multiplex rates
7.4.2 1:2 multiplex drive mode
When two backplanes are provided in the LCD, the 1:2 multiplex mode applies. The
PCA85132 allows the use of 1⁄2 bias or 1⁄3 bias in this mode as shown in Figure 6 and
Figure 7.
BP0
BP1
Sn
Sn+1
VLCD
VLCD/2
VSS
VLCD
VLCD/2
VSS
VLCD
VSS
VLCD
VSS
state 1
state 2
VLCD
VLCD/2
0V
−VLCD/2
−VLCD
VLCD
VLCD/2
0V
−VLCD/2
−VLCD
Tfr
LCD segments
state 1
state 2
(a) Waveforms at driver.
(b) Resultant waveforms
at LCD segment.
013aaa208
Fig 6.
Vstate1(t) = VSn(t) − VBP0(t).
Von(RMS) = 0.791VLCD.
Vstate2(t) = VSn(t) − VBP1(t).
Voff(RMS) = 0.354VLCD.
Waveforms for the 1:2 multiplex drive mode with 1⁄2 bias
PCA85132_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 6 May 2010
© NXP B.V. 2010. All rights reserved.
11 of 53
11 Page | ||
| Páginas | Total 53 Páginas | |
| PDF Descargar | [ Datasheet PCA85132.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| PCA85132 | LCD driver for low multiplex rates | NXP Semiconductors |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |