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PDF IP4350CX24 Data sheet ( Hoja de datos )
| Número de pieza | IP4350CX24 | |
| Descripción | 9-channel SD memory card interface ESD protection filter to IEC 61000-4-2 level 4 | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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IP4350CX24
www.DataSheet4U.com
9-channel SD memory card interface ESD protection filter to
IEC 61000-4-2 level 4
Rev. 01 — 5 February 2010
Product data sheet
1. Product profile
1.1 General description
The IP4350CX24 is a diode array designed to provide protection to downstream
components against ElectroStatic Discharge (ESD) voltages as high as 15 kV.
The IP4350CX24 integrates 9 pairs of rail-to-rail diodes, 12 Zener diodes and 15 resistors
in a single wafer-level chip-scale package. It is fabricated using monolithic silicon
semiconductor technology and measures only 1.95 mm × 2.11 mm.
These features make the IP4350CX24 ideal for use in applications requiring a high degree
of miniaturization, such as mobile phone handsets, cordless telephones and personal
digital devices.
1.2 Features
I Pb-free, RoHS compliant and free of halogen and antimony (Dark Green compliant)
I All SD memory card channels with integrated ESD protection, EMI and RF filters
I ESD protection up to 15 kV on 9 channels at output terminals
I Integrated EMI and RF filters with pull-up resistors on 5 channels
I Integrated EMI and RF filters on 4 channels
I Additional SD card power supply protection
I Wafer level chip-scale package with 0.4 mm pitch
I Write protection, card detect biasing resistor integrated
I Supports electrical card detection
I Also available as IP4352CX24 with different filter behavior, same footprint
1.3 Applications
I SD memory card interfaces in cellular and PCS mobile handsets
I Cordless telephones
I Digital still and video cameras
I Media players
I Card readers
1 page  
NXP Semiconductors
IP4350CX24
www.DataSheet4U.com
9-channel SD memory card interface ESD protection filter
7. Frequency response
Table 5.
Symbol
αil
Frequency response
Parameter
insertion loss
Conditions
all channels; Rsource = 50 Ω;
RL = 50 Ω
f < 400 MHz
400 MHz < f < 800 MHz
800 MHz < f < 2.5 GHz
2.5 GHz < f < 6.0 GHz
Table 6. Time domain response[1]
Symbol Parameter
Conditions
high speed Rsource = 50 Ω; tr = tf = 2 ns[2]
tr rise time
load 20 pF || 100 kΩ
load 40 pF || 100 kΩ
tf fall time
load 20 pF || 100 kΩ
load 40 pF || 100 kΩ
[1] All rise or fall times measured using source with 0 V to 3 V steps, 10 % to 90 %.
[2] Performed on all high speed lines (channels including R1 to R9, see Figure 2).
8. Application information
Min Typ Max Unit
--
3-
6-
15 -
3 dB
6 dB
15 dB
25 dB
Min Typ Max Unit
- 2.3 - ns
- 3.4 - ns
- 2.4 - ns
- 3.5 - ns
8.1 Insertion loss
The insertion loss measurement configuration of a typical NetWork Analyzer (NWA)
system is shown in Figure 3. The insertion loss is measured with a test PCB utilizing laser
drilled micro-via holes that connect the PCB ground plane to the IP4350CX24 ground
pins.
DUT
IN OUT
50 Ω TEST BOARD
50 Ω
Vgen
001aai718
Fig 3. Frequency response set-up
The frequency response curves for all channels at frequencies up to 6 GHz are shown in
Figure 4 to Figure 7.
IP4350CX24_1
Product data sheet
Rev. 01 — 5 February 2010
© NXP B.V. 2010. All rights reserved.
5 of 16
5 Page 
NXP Semiconductors
IP4350CX24
www.DataSheet4U.com
9-channel SD memory card interface ESD protection filter
10. Soldering of WLCSP packages
10.1 Introduction to soldering WLCSP packages
This text provides a very brief insight into a complex technology. A more in-depth account
of soldering WLCSP (Wafer Level Chip-Size Packages) can be found in application note
AN10439 “Wafer Level Chip Scale Package” and in application note AN10365 “Surface
mount reflow soldering description”.
Wave soldering is not suitable for this package.
All NXP WLCSP packages are lead-free.
10.2 Board mounting
Board mounting of a WLCSP requires several steps:
1. Solder paste printing on the PCB
2. Component placement with a pick and place machine
3. The reflow soldering itself
10.3 Reflow soldering
Key characteristics in reflow soldering are:
• Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to
higher minimum peak temperatures (see Figure 13) than a PbSn process, thus
reducing the process window
• Solder paste printing issues, such as smearing, release, and adjusting the process
window for a mix of large and small components on one board
• Reflow temperature profile; this profile includes preheat, reflow (in which the board is
heated to the peak temperature), and cooling down. It is imperative that the peak
temperature is high enough for the solder to make reliable solder joints (a solder paste
characteristic) while being low enough that the packages and/or boards are not
damaged. The peak temperature of the package depends on package thickness and
volume and is classified in accordance with Table 7.
Table 7. Lead-free process (from J-STD-020C)
Package thickness (mm) Package reflow temperature (°C)
Volume (mm3)
< 350
350 to 2000
< 1.6
260 260
1.6 to 2.5
260 250
> 2.5
250 245
> 2000
260
245
245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 13.
IP4350CX24_1
Product data sheet
Rev. 01 — 5 February 2010
© NXP B.V. 2010. All rights reserved.
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| PDF Descargar | [ Datasheet IP4350CX24.PDF ] | |
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