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PDF NLAST4052 Data sheet ( Hoja de datos )
| Número de pieza | NLAST4052 | |
| Descripción | Analog Multiplexer/Demultiplexer | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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NLAST4052
Analog Multiplexer/
Demultiplexer
TTL Compatible, Double–Pole, 4–Position
Plus Common Off
The NLAST4052 is an improved version of the MC14052 and
MC74HC4052 fabricated in sub–micron Silicon Gate CMOS
technology for lower RDS(on) resistance and improved linearity with
low current. This device may be operated either with a single supply or
dual supply up to ±3 V to pass a 6 VPP signal without coupling
capacitors.
When operating in single supply mode, it is only necessary to tie
VEE, pin 7 to ground. For dual supply operation, VEE is tied to a
negative voltage, not to exceed maximum ratings. Translation is
provided in the device, the Address and Inhibit pins are standard TTL
level compatible. For CMOS compatibility see NLAS4052. Pin for
pin compatible with all industry standard versions of ‘4052.’
• Improved RDS(on) Specifications
• Pin for Pin Replacement for MAX4052 and MAX4052A
– One Half the Resistance Operating at 5.0 Volts
• Single or Dual Supply Operation
– Single 3–5 Volt Operation, or Dual ±3 Volt Operation
– With VCC of 3.0 to 3.3 V, Device Can Interface with 1.8 V Logic,
– No Translators Needed
– Address and Inhibit pins are Logic is Over–Voltage Tolerant and –
– May Be Driven Up +6 V Regardless of VCC
• Address and Inhibit pins are Standard TTL Compatible
– Greatly Improved Noise Margin Over MAX4052 and MAX4052A
– True TTL Compatibility VIL = 0.8 V, VIH = 2.0 V
• Improved Linearity Over Standard HC4052 Devices
• Popular SOIC, and Space Saving TSSOP, and QSOP 16 Pin
Packages
www.DataSheet4U.com
http://onsemi.com
SO–16
D SUFFIX
CASE 751B
TSSOP–16
DT SUFFIX
CASE 948F
MARKING DIAGRAMS
16 9
NLAST4052
AWLYWW
18
16 9
NLAST
ALYW
18
QSOP–16
QS SUFFIX
CASE 492
16 9
NLAST
4052
ALYW
18
A
L, WL
Y
W
= Assembly Location
= Wafer Lot
= Year
= Work Week
ORDERING INFORMATION
Device
NLAST4052D
NLAST4052DR2
NLAST4052DT
NLAST4052DTR2
NLAST4052QS
NLAST4052QSR
Package Shipping
SO–16
SO–16
48 Units/Rail
2500 Units/Reel
TSSOP–16 96 Units/Rail
TSSOP–16 2500 Units/Reel
QSOP–16 98 Units/Rail
QSOP–16 2500 Units/Reel
© Semiconductor Components Industries, LLC, 2002
June, 2002 – Rev. 2
1
Publication Order Number:
NLAST4052/D
1 page  
NLAST4052
AC CHARACTERISTICS (Input tr = tf = 3 ns)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSymbol
Parameter
Test Conditions
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎtBBM
Minimum Break–Before–Make VIN = VIL or VIH
Guaranteed Limit www.DataSheet4U.com
VCC
V
3.0
VEE
V
0.0
–55 to 25°C
Min Typ*
1.0 6.5
v85°C v125°C Unit
– – ns
Time
VIS = VCC
4.5 0.0 1.0
5.0
–
–
RL = 300 W, CL = 35 pF
3.0 –3.0 1.0
3.5
–
–
(Figure 19)
*Typical Characteristics are at 25°C.
AC CHARACTERISTICS (CL = 50 pF, Input tr = tf = 3 ns)
Guaranteed Limit
Symbol
Parameter
VCC
V
VEE
V
–55 to 25°C
Min Typ Max
v85°C
Min Max
v125°C
Min Max
Unit
tTRANS
Transition Time
(Address Selection Time)
(Figure 18)
2.5 0
3.0 0
4.5 0
3.0 –3.0
40 45 50 ns
28 30 35
23 25 30
23 25 28
tON Turn–on Time
2.5 0
(Figures 14, 15, 20, and 21)
3.0 0
Enable to NO or NC
4.5 0
3.0 –3.0
40 45 50 ns
28 30 35
23 25 30
23 25 28
tOFF
Turn–off Time
(Figures 14, 15, 20, and 21)
Enable to NO or NC
2.5 0
3.0 0
4.5 0
3.0 –3.0
40 45 50 ns
28 30 35
23 25 30
23 25 28
CIN
CNO or CNC
CCOM
C(ON)
Maximum Input Capacitance,Select Inputs
Analog I/O
Common I/O
Feedthrough
Typical @ 25°C, VCC = 5.0 V
8
10
10
1.0
pF
http://onsemi.com
5
5 Page 
NLAST4052
Open
Input
DUT
VCC
Output
300 W
VOUT
35 pF
Enable
VCC
Input
0V
Output
VOL
50%
VCC
10%
tOFF
Figure 21. tON/tOFF
www.DataSheet4U.com
50%
10%
tON
Reference
DUT
Input
50 W Generator
Output
50 W
Transmitted
50 W
Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. On loss is
the bandwidth of an On switch. VISO, Bandwidth and VONL are independent of the input signal direction.
ǒ ǓVOUT
VISO = Off Channel Isolation = 20 Log VIN for VIN at 100 kHz
ǒ ǓVONL = On Channel Loss = 20 Log
VOUT
VIN
for VIN at 100 kHz to 50 MHz
Bandwidth (BW) = the frequency 3 dB below VONL
Figure 22. Off Channel Isolation/On Channel Loss (BW)/Crosstalk
(On Channel to Off Channel)/VONL
http://onsemi.com
11
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet NLAST4052.PDF ] | |
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