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Número de pieza | NTMFS4841N | |
Descripción | Power MOSFET ( Transistor ) | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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No Preview Available ! NTMFS4841N
Power MOSFET
30 V, 57 A, Single N−Channel, SO−8 FL
Features
• Low RDS(on) to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
• Optimized Gate Charge to Minimize Switching Losses
• These are Pb−Free Device
Applications
• CPU Power Delivery
• DC−DC Converters
www.DataSheet4U.com
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
Symbol Value Unit
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current RqJA
(Note 1)
Power Dissipation
RqJA (Note 1)
Continuous Drain
Current RqJA
(Note 2)
Power Dissipation
RqJA (Note 2)
Continuous Drain
Current RqJC
(Note 1)
Steady
State
Power Dissipation
RqJC (Note 1)
Pulsed Drain
Current
tp=10ms
TA = 25°C
TA = 85°C
TA = 25°C
TA = 25°C
TA = 85°C
TA = 25°C
TC = 25°C
TC = 85°C
TC = 25°C
TA = 25°C
VDSS
VGS
ID
PD
ID
PD
ID
PD
IDM
30
20
13.1
9.5
2.17
8.3
6
0.87
57
41
41.7
115
V
V
A
W
A
W
A
W
A
Operating Junction and Storage
Temperature
Source Current (Body Diode)
Drain to Source dV/dt
TJ,
TSTG
IS
dV/dt
−55 to
+150
35
6
°C
A
V/ns
Single Pulse Drain−to−Source Avalanche
Energy (VDD = 30 V, VGS = 10 V,
IL = 19 Apk, L = 1.0 mH, RG = 25 W)
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
EAS
TL
180 mJ
260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
http://onsemi.com
V(BR)DSS
30 V
RDS(ON) MAX
7.0 mW @ 10 V
11.4 mW @ 4.5 V
ID MAX
57 A
D (5,6)
G (4)
S (1,2,3)
N−CHANNEL MOSFET
1
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
MARKING
DIAGRAM
D
SD
S 4841N
S AYWWG
GGD
D
A = Assembly Location
Y = Year
WW = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
NTMFS4841NT1G
Package
SO−8FL
(Pb−Free)
Shipping†
1500 /
Tape & Reel
NTMFS4841NT3G SO−8FL
5000 /
(Pb−Free) Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2006
May, 2006 − Rev. 0
1
Publication Order Number:
NTMFS4841N/D
1 page NTMFS4841N
TYPICAL PERFORMANCE CURVES
2200
2000
1800
Ciss
TJ = 25°C
1600
1400
Ciss
1200
1000
800 Crss
600
400 Coss
200
0 Crss
−10 −5 0
5 10 15 20 25 30
www.DataSheet4U.comVGS VDS
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
12
11 QT
10
9
8
7
6
5
4 QGS
QGD
3 VDD = 15 V
2 VGS = 11.5 V
1
ID = 30 A
TJ = 25°C
0
0 2 4 6 8 10 12 14 16 18 20 22 24 26
QG, TOTAL GATE CHARGE (nC)
Figure 8. Gate−To−Source and Drain−To−Source
Voltage vs. Total Charge
1000
VDD = 15 V
ID = 15 A
VGS = 11.5 V
100
30
VGS = 0 V
25 TJ = 25°C
20
tr
td(off)
10 td(on)
tf
1
1 10 100
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
15
10
5
0
0.5 0.6 0.7 0.8 0.9 1.0
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage vs. Current
1000
100 10 ms
VGS = 20 V
10
SINGLE PULSE
TC = 25°C
100 ms
1 ms
1
0.1
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1
10
10 ms
dc
100
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
180
ID = 19 A
160
140
120
100
80
60
40
20
0
25 50 75 100 125 150
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
http://onsemi.com
5
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Páginas | Total 7 Páginas | |
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