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PDF IMP2119 Data sheet ( Hoja de datos )
| Número de pieza | IMP2119 | |
| Descripción | 9-Line ULTRA3 LVD/SE SCSI Terminator | |
| Fabricantes | IMP | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de IMP2119 (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
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IMP2119
DATA COMMUNICATIONS
9-Line ULTRA3 LVD/SE
SCSI Terminator
The IMP2119 is a multimode SCSI terminator that conforms to the SCSI
Parallel Interconnect-2 (SPI-2) specification developed by the T10 stan-
dards committee for low voltage differential (LVD) termination.
Multimode compatibility permits the use of legacy devices on the bus
without hardware alterations. Automatic mode selection is achieved
through voltage detection on the diffsense line.
The IMP2119 delivers the ultimate in SCSI bus performance while saving
wwcowm.DpaotnaeSnhteecot4sUt .acnodmboard area. Elimination of the external capacitors
also mitigates the need for a lengthy capacitor selection process. The indi-
vidual high bandwidth drivers also maximize channel separation and
reduce channel to channel noise and cross talk. The high bandwidth
architecture insures ULTRA3 performance.
When the IMP2119 is enabled, the differential sense (DIFFSENSE) pin
supplies a voltage between 1.2V and 1.4V. In application, this pin is tied
to the DIFFSENSE input of the corresponding LVD transceivers. This
action enables the LVD transceiver function. DIFFSENSE is capable of
supplying a maximum of 15mA. Tying the DIFFSENSE pin HIGH places
the IMP2119 in a high impedance state indicating the presence of an
HVD device. Tying the pin LOW places the part in a single-ended mode
while also signaling the multimode transceiver to operate in a single-
ended mode.
Recognizing the needs of portable and configurable peripherals, the
IMP2119 have a TTL compatible sleep/disable mode. During this
sleep/disable mode, power dissipation is reduced to a meager 15µA
while also placing all outputs in a high impedance state. Also during
Key Features
N Auto-selectable LVD or single-ended termination
N 3.0pF maximum disabled output capacitance
N Fast response, no external capacitors required
N Compatible with active negation drivers
N 15µA supply current in disconnect mode
N Logic command disconnects all termination lines
N DIFFSENSE line driver
N Ground driver integrated for single-ended
operation
N Current limit and thermal protection
N Hot-swap compatible (single-ended)
N Compatible with SCSI, SPI-2, SPI-3, SPI-4
ULTRA160 and ULTRA320
N Pin compatible with DS2119
sleep/disable mode, the DIFFSENSE function is disabled
and is placed in a high impedance state.
Another key feature of the IMP2119 is the master/slave
function. Driving this pin HIGH or floating the pin enables
the 1.3V DIFFSENSE reference. Driving the pin LOW dis-
ables the on board DIFFSENSE reference and enables use
of an external master reference device.
Block Diagram
TPWR
ISO
Internal VREF
1.30V
Power ON
M/S
DIFFSENSE
DIFF_CAP
© 2002 IMP, Inc.
LVD
1.25V
10mA
MODE Control & Delay
Window SE
Comp.
HVD
20kΩ LVD
Power ON & MODE Delay
Power ON
Latch
SE 2.85V, 22.5mA
1.07mA
200 52.5
52.5
SE
2.2V
SE
DISC/HVD
LVD
1.07mA
SE
HVD
LVD
20
Data Communications
1 of 9
LVD(-) / SE
LVD(+) / SE
(Pseudo-GND)
SE
HVD
LVD
5241/42 01 eps
1
1 page  
Parameter
ISO Section
ISO Thresholds
Input Current
MASTER/SLAVE Section
MASTER/SLAVE Thresholds
Input Current
www.DataSheet4U.com
Symbol Condition
VTH
IIL ISO = 0 V
IIH ISO = 2.4V
VTH (MS)
IIL (MS)
IIL (MS)
MASTER/SLAVE = 0V
MASTER/SLAVE = 2.4V
IMP2119
Electrical Characteristics
Min Typ Max Units
0.8 2.0
10
10 0
V
µA
nA
0.8 2.0 V
10 µA
100
nA
5241/42_t05.at3
© 2002 IMP, Inc.
Data Communications
5
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet IMP2119.PDF ] | |
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