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PDF HMD1M36M3EG Data sheet ( Hoja de datos )
| Número de pieza | HMD1M36M3EG | |
| Descripción | 4Mbyte(1Mx36) 72-pin SIMM EDO | |
| Fabricantes | Hanbit Electronics | |
| Logotipo |  |
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HANBit
HMD1M36M3EG
4Mbyte(1Mx36) 72-pin SIMM EDO with Parity MODE, 1K Ref. 5V
Part No. HMD1M36M3EG
GENERAL DESCRIPTION
The HMD1M36M3EG is a 1M x 36 bit dynamic RAM high-density memory module. The module consists of two CMOS
1M x 16 bit DRAMs in 42-pin TSOP packages and one CMOS 1M x 4bit Quad CAS DRAM in 28pin SOJ package
mounted on a 72-pin. A 0.1 or 0.22uF decoupling capacitor is mounted on the printed circuit board for each DRAM
components. The module is a single In-line memory module with edge connections and is intended for mounting in to 72-
pin edge connector sockets. All module components may be powered from a single 5V DC power supply. All inputs and
outputs are TTL-compatible.
www.DataSheet4U.com
FEATURES
w Part Identification
HMD1M36M3EG- 1K Cycles/16ms Ref, Gold
w Access times : 50, 60ns
w High-density 4MByte design
w Single +5V ±0.5V power supply
wJEDEC standard pinout
w EDO Mode operation
w TTL compatible inputs and outputs
w FR4-PCB design
OPTIONS
w Timing
50ns access
60ns access
w Packages
72-pin SIMM
MARKING
-5
-6
M
PRESENCE DETECT PINS
Pin
50ns
60ns
PD1 Vss Vss
PD2
NC
NC
PD3
Vss
NC
PD4
Vss
PERFORMANCE RANGE
NC
Speed tRAC tCAC tRC tHPC
5
50ns
13ns
90ns
26ns
6
60ns
15ns
110ns
30ns
PIN ASSIGNMENT
PIN SYMBOL PIN SYMBOL PIN SYMBOL
1 Vss 25 DQ24 49 DQ9
2
DQ0
26
DQ7
50 DQ27
3 DQ18 27 DQ25 51 DQ10
4
DQ1
28
A7
52 DQ28
5 DQ19 29 NC 53 DQ11
6
DQ2
30
Vcc
54 DQ29
7 DQ20 31 A8 55 DQ12
8
DQ3
32
A9
56 DQ30
9 DQ21 33 NC 57 DQ13
10 Vcc 34 /RAS0 58 DQ31
11 NC 35 DQ26 59 Vcc
12 A0 36 DQ8 60 DQ32
13 A1 37 DQ17 61 DQ14
14 A2 38 DQ35 62 DQ33
15 A3 39 Vss 63 DQ15
16 A4 40 /CAS0 64 DQ34
17 A5 41 /CAS2 65 DQ16
18 A6 42 /CAS3 66 NC
19 NC 43 /CAS1 67 PD1
20 DQ4 44 /RAS0 68 PD2
21 DQ22 45 NC 69 PD3
22
DQ5
46
NC
70 PD4
23 DQ23 47
/WE
71
NC
24
DQ6
48
NC
72 Vss
URL:www.hbe.co.kr
REV.1.0(August.2002)
1 HANBit Electronics Co.,Ltd.
1 page  
HANBit
HMD1M36M3EG
/CAS to /RAS precharge time
tCRP
5
5
ns
Row address set-up time
tASR
0
0
ns
Row address hold time
tRAH
10
10
ns
Column address set-up time
tASC
0
0
ns
Column address hold time
tCAH
8
10
ns
Column Address to /RAS lead time
tRAL 25
30
ns
Read command set-up time
tRCS
0
0
ns
Read command hold referenced to /CAS
tRCH
0
0
ns
Read command hold referenced to /RAS
tRRH
0
0
ns
Write command hold time
www.DataSheWetr4itUe.ccoommmand hold referenced to /RAS
tWCH
tWCR
10
50
10
50
ns
ns
Write command pulse width
tWP 10
10
ns
Write command to /RAS lead time
tRWL
13
15
ns
Write command to /CAS lead time
tCWL
8
10
ns
Data-in set-up time
tDS 0
0
ns
Data-in hold time
tDH 8
10
ns
Data-in hold referenced to /RAS
tDHR
50
50
ns
Refresh period
tREF 64 64 ns
Write command set-up time
tWCS
0
0
ns
/CAS setup time (C-B-R refresh)
tCSR
5
5
ns
/CAS hold time (C-B-R refresh)
tCHR
10
10
ns
/RAS precharge to /CAS hold time
tRPC
5
5
ns
Access time from /CAS precharge
tCPA 30 35 ns
Fast page mode cycle time
tPC 40
40
ns
/CAS precharge time (Fast page)
tCP 8
10
ns
/RAS pulse width (Fast page )
tRASP
50
200K 60
200K
ns
/W to /RAS precharge time (C-B-R refresh)
tWRP
10
10
ns
/W to /RAS hold time (C-B-R refresh)
tWRH
10
10
ns
/CAS precharge(C-B-R counter test)
tCPT 20
20
ns
NOTES
1.An initial pause of 200µs is required after power-up followed by any 8 /RAS-only or /CAS-before-/RAS refresh cycles
before proper device operation is achieved.
2.VIH (min) and VIL (max) are reference levels for measuring timing of input signals. Transition times are measured between
VIH(min) and VIL(max) and are assumed to be 5ns for all inputs.
3.Measured with a load equivalent to 2TTL loads and 100pF
4.Operation within the tRCD(max) limit insures that tRAC(max) can be met. tRCD(max) is specified as a reference point only. If tRCD
is greater than the specified tRCD(max) limit, then access time is controlled exclusively by tCAC.
5.Assumes that tRCD ≥ tRCD(max)
6. tAR, tWCR, tDHR are referenced to tRAD(max)
URL:www.hbe.co.kr
REV.1.0(August.2002)
5 HANBit Electronics Co.,Ltd.
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet HMD1M36M3EG.PDF ] | |
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