PDF EN25P64 Data sheet ( Hoja de datos )

Número de pieza	EN25P64
Descripción	64 Megabit Uniform Sector
Fabricantes	Eon Silicon Solution
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No Preview Available ! EN25P64 Purpose Eon Silicon Solution Inc. (hereinafter called “Eon”) is going to provide its products’ top marking on ICs with < cFeon > from January 1st, 2009, and without any change of the part number and the compositions of the ICs. Eon is still keeping the promise of quality for all the products with the same as that of Eon delivered before. Please be advised with the change and appreciate your kindly cooperation and fully support Eon’s product family. Eon products’ New Top Marking www.DataSheet4U.com cFeon Top Marking Example: cFeon Part Number: XXXX-XXX Lot Number: XXXXX Date Code: XXXXX Continuity of Specifications There is no change to this data sheet as a result of offering the device as an Eon product. Any changes that have been made are the result of normal data sheet improvement and are noted in the document revision summary, where supported. Future routine revisions will occur when appropriate, and changes will be noted in a revision summary. Continuity of Ordering Part Numbers Eon continues to support existing part numbers beginning with “Eon” and “cFeon” top marking. To order these products, during the transition please specify “Eon top marking” or “cFeon top marking” on your purchasing orders. For More Information Please contact your local sales office for additional information about Eon memory solutions. This Data Sheet may be revised by subsequent versions or modifications due to changes in technical specifications. 1 ©2004 Eon Silicon Solution, Inc., Rev. D, Issue Date: 2009/1/8 www.eonssi.com. 1 page MEMORY ORGANIZATION The memory is organized as: z 8,388,608 bytes z Uniform Sector Architecture One hundred twenty-eight 64-Kbyte sectors z 32768 pages (256 bytes each) EN25P64 Each page can be individually programmed (bits are programmed from 1 to 0). The device is Sector or Bulk Erasable but not Page Erasable. Table 2 Block Sector Architecture Sector 127 www.DataSheet4U.co1m26 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 SECTOR SIZE (KByte) 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 64 Address range 7F0000h – 7FFFFFh 7E0000h – 7EFFFFh 7D0000h – 7DFFFFh 7C0000h – 7CFFFFh 7B0000h – 7BFFFFh 7A0000h – 7AFFFFh 790000h – 79FFFFh 780000h – 78FFFFh 770000h – 77FFFFh 760000h – 76FFFFh 750000h – 75FFFFh 740000h – 74FFFFh 730000h – 73FFFFh 720000h – 72FFFFh 710000h – 71FFFFh 700000h – 70FFFFh 6F0000h – 6FFFFFh 6E0000h – 6EFFFFh 6D0000h – 6DFFFFh 6C0000h – 6CFFFFh 6B0000h – 6BFFFFh 6A0000h – 6AFFFFh 690000h – 69FFFFh 680000h – 68FFFFh 670000h – 67FFFFh 660000h – 66FFFFh 650000h – 65FFFFh 640000h – 64FFFFh 630000h – 63FFFFh 620000h – 62FFFFh 610000h – 61FFFFh 600000h – 60FFFFh 5F0000h – 5FFFFFh 5E0000h – 5EFFFFh 5D0000h – 5DFFFFh 5C0000h – 5CFFFFh 5B0000h – 5BFFFFh This Data Sheet may be revised by subsequent versions or modifications due to changes in technical specifications. 5 ©2004 Eon Silicon Solution, Inc., Rev. D, Issue Date: 2009/1/8 www.eonssi.com. 5 Page EN25P64 INSTRUCTIONS All instructions, addresses and data are shifted in and out of the device, most significant bit first. Serial Data Input (DI) is sampled on the first rising edge of Serial Clock (CLK) after Chip Select (CS#) is driven Low. Then, the one-byte instruction code must be shifted in to the device, most significant bit first, on Serial Data Input (DI), each bit being latched on the rising edges of Serial Clock (CLK). The instruction set is listed in Table 4. Every instruction sequence starts with a one-byte instruction code. Depending on the instruction, this might be followed by address bytes, or by data bytes, or by both or none. Chip Select (CS#) must be driven High after the last bit of the instruction sequence has been shifted in. In the case of a Read Data Bytes (READ), Read Data Bytes at Higher Speed (Fast_Read), Read Status Register (RDSR) or Release from Deep Power-down, and Read Device ID (RDI) instruction, the shifted-in instruction sequence is followed by a data-out sequence. Chip Select (CS#) can be driven High after any bit of the data-out sequence is being shifted out. In the case of a Page Program (PP), Sector Erase (SE), Bulk Erase (BE), Write Status Register (WRSR), Write Enable (WREN), Write Disable (WRDI) or Deep Power-down (DP) instruction, Chip www.DataShSeeelet4cUt.c(CoSm#) must be driven High exactly at a byte boundary, otherwise the instruction is rejected, and is not executed. That is, Chip Select (CS#) must driven High when the number of clock pulses after Chip Select (CS#) being driven Low is an exact multiple of eight. For Page Program, if at any time the input byte is not a full byte, nothing will happen and WEL will not be reset. In the case of multi-byte commands of Page Program (PP), and Release from Deep Power Down (RES ) minimum number of bytes specified has to be given, without which, the command will be ignored. In the case of Page Program, if the number of byte after the command is less than 4 (at least 1 data byte), it will be ignored too. In the case of SE, exact 24-bit address is a must, any less or more will cause the command to be ignored. All attempts to access the memory array during a Write Status Register cycle, Program cycle or Erase cycle are ignored, and the internal Write Status Register cycle, Program cycle or Erase cycle continues unaffected. Table 4. Instruction Set Instruction Name Byte 1 Code Byte 2 Byte 3 Byte 4 Byte 5 Byte 6 n-Bytes Write Enable 06h Write Disable Read Status Register Write Status Register Read Data Fast Read 04h 05h (S7-S0)(1) 01h S7-S0 continuous(2) 03h A23-A16 A15-A8 A7-A0 (D7-D0) (Next byte) continuous 0Bh A23-A16 A15-A8 A7-A0 dummy (D7-D0) (Next Byte) continuous Page Program 02h A23-A16 A15-A8 A7-A0 D7-D0 Next byte continuous Sector Erase D8h A23-A16 A15-A8 A7-A0 Bulk Erase C7h Deep Power-down B9h Release from Deep Power-down, and read Device ID Release from Deep Power-down ABh dummy dummy dummy (ID7-ID0) (3) This Data Sheet may be revised by subsequent versions or modifications due to changes in technical specifications. 11 ©2004 Eon Silicon Solution, Inc., Rev. D, Issue Date: 2009/1/8 www.eonssi.com. 11 Page

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