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PDF ICS85411 Data sheet ( Hoja de datos )
| Número de pieza | ICS85411 | |
| Descripción | 1-TO-2 DIFFERENTIAL-TO-LVDS FANOUT BUFFER | |
| Fabricantes | Integrated Circuit Systems | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ICS85411 (archivo pdf) en la parte inferior de esta página. Total 13 Páginas | ||
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Integrated
Circuit
Systems, Inc.
ICS85411
LOW SKEW, 1-TO-2
DIFFERENTIAL-TO-LVDS FANOUT BUFFER
GENERAL DESCRIPTION
The ICS85411 is a low skew, high performance
ICS 1-to-2 Differential-to-LVDS Fanout Buffer and a
HiPerClockS™ member of the HiPerClockS™family of High
Performance Clock Solutions from ICS. The
CLK, nCLK pair can accept most standard differ-
ential input levels.The ICS85411 is characterized to oper-
ate from a 3.3V power supply. Guaranteed output and
part-to-par t skew characteristics make the ICS85411
ideal for those clock distribution applications demand-
ing well defined performance and repeatability.
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FEATURES
• 2 differential LVDS outputs
• 1 differential CLK, nCLK clock input
• CLK, nCLK pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
• Maximum output frequency: 650MHz
• Translates any single ended input signal to
LVDS levels with resistor bias on nCLK input
• Output skew: 20ps (maximum)
• Part-to-part skew: 250ps (maximum)
• Additive phase jitter, RMS: 0.05ps (typical)
• Propagation delay: 2.5 ns (maximum)
• 3.3V operating supply
• 0°C to 70°C ambient operating temperature
• Lead-Free package available
• Industrial temperature information available upon request
BLOCK DIAGRAM
CLK
nCLK
Q0
nQ0
Q1
nQ1
PIN ASSIGNMENT
Q0
nQ0
Q1
nQ1
1
2
3
4
8 VDD
7 CLK
6 nCLK
5 GND
ICS85411
8-Lead SOIC
3.90mm x 4.90mm x 1.37mm package body
M Package
Top View
85411AM
www.icst.com/products/hiperclocks.html
1
REV. B JUNE 16, 2004
1 page  
Integrated
Circuit
Systems, Inc.
ICS85411
LOW SKEW, 1-TO-2
DIFFERENTIAL-TO-LVDS FANOUT BUFFER
ADDITIVE PHASE JITTER
The spectral purity in a band at a specific offset from the funda-
mental compared to the power of the fundamental is called the
dBc Phase Noise. This value is normally expressed using a
Phase noise plot and is most often the specified plot in many
applications. Phase noise is defined as the ratio of the noise
power present in a 1Hz band at a specified offset from the fun-
damental frequency to the power value of the fundamental. This
ratio is expressed in decibels (dBm) or a ratio of the power in
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0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
100 1k 10k 100k
the 1Hz band to the power in the fundamental. When the re-
quired offset is specified, the phase noise is called a dBc value,
which simply means dBm at a specified offset from the funda-
mental. By investigating jitter in the frequency domain, we get a
better understanding of its effects on the desired application over
the entire time record of the signal. It is mathematically possible
to calculate an expected bit error rate given a phase noise plot.
Input/Output Additive Phase Jitter
@ 200MHz (12KHz to 20MHz)
= 0.05ps typical
1M
10M
100M
500M
OFFSET FROM CARRIER FREQUENCY (HZ)
As with most timing specifications, phase noise measurements
have issues. The primary issue relates to the limitations of the
equipment. Often the noise floor of the equipment is higher than
the noise floor of the device. This is illustrated above. The de-
vice meets the noise floor of what is shown, but can actually be
lower. The phase noise is dependant on the input source and
measurement equipment.
85411AM
www.icst.com/products/hiperclocks.html
5
REV. B JUNE 16, 2004
5 Page 
Integrated
Circuit
Systems, Inc.
PACKAGE OUTLINE - M SUFFIX FOR 8 LEAD SOIC
ICS85411
LOW SKEW, 1-TO-2
DIFFERENTIAL-TO-LVDS FANOUT BUFFER
www.DataSheet4U.com
85411AM
TABLE 6. PACKAGE DIMENSIONS
SYMBOL
Millimeters
MINIMUN
MAXIMUM
N8
A 1.35 1.75
A1 0.10 0.25
B 0.33 0.51
C 0.19 0.25
D 4.80 5.00
E 3.80 4.00
e 1.27 BASIC
H 5.80 6.20
h 0.25 0.50
L 0.40 1.27
α 0° 8°
Reference Document: JEDEC Publication 95, MS-012
www.icst.com/products/hiperclocks.html
11
REV. B JUNE 16, 2004
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet ICS85411.PDF ] | |
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