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PDF ICS85401 Data sheet ( Hoja de datos )
| Número de pieza | ICS85401 | |
| Descripción | 2:1 DIFFERENTIAL-TO-LVDS MULTIPLEXER | |
| Fabricantes | Integrated Circuit Systems | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ICS85401 (archivo pdf) en la parte inferior de esta página. Total 11 Páginas | ||
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Integrated
Circuit
Systems, Inc.
ICS85401
2:1
DIFFERENTIAL-TO-LVDS MULTIPLEXER
GENERAL DESCRIPTION
ICS
The ICS85401 is a high performance 2:1 Differ-
ential-to-LVDS Multiplexer and a member of the
HiPerClockS™ HiPerClockS™family of High Performance Clock
Solutions from ICS. The ICS85401 can also per-
form differential translation because the differ-
ential inputs accept LVPECL, CML as well as LVDS levels.
The ICS85401 is packaged in a small 3mm x 3mm
16 VFQFN package, making it ideal for use on space con-
strained boards.
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FEATURES
• 2:1 LVDS MUX
• 1 LVDS output
• 2 differential clock inputs can accept: LVPECL, LVDS, CML
• Maximum input/output frequency: >2.5GHz
• Translates LVCMOS/LVTTL input signals to LVDS levels by
using a resistor bias network on nCLK0, nCLK1
• Propagation delay: 460ps (maximum)
• Part-to-part skew: 100ps (maximum)
• 3.3V operating supply
• -40°C to 85°C ambient operating temperature
BLOCK DIAGRAM
CLK0
nCLK0
CLK1
nCLK1
CLK_SEL
85401AK
0
Q
nQ
1
PIN ASSIGNMENT
16 15 14 13
CLK0 1
12 GND
nCLK0 2
11 Q
CLK1 3
10 nQ
nCLK1 4
9 GND
5678
ICS85401
16-Lead VFQFN
3mm x 3mm x 0.95 package body
K Package
Top View
www.icst.com/products/hiperclocks.html
1
REV. A FEBRUARY 22, 2005
1 page  
Integrated
Circuit
Systems, Inc.
ICS85401
2:1
DIFFERENTIAL-TO-LVDS MULTIPLEXER
PARAMETER MEASUREMENT INFORMATION
3.3V ± 5%
Power Supply
Float GND
+-
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LVDS
3.3V OUTPUT LOAD AC TEST CIRCUIT
SCOPE
Qx
nQx
V
DD
nCLK0,
nCLK1
nCLK0,
nCLK1
V
PP
Cross Points
GND
DIFFERENTIAL INPUT LEVEL
V
CMR
nQx
PART 1
Q0x
nQy
PART 2
Qy
t sk(pp)
PART-TO-PART SKEW
nCLK0,
nCLK1
CLK0,
CLK1
nQ
Q
tPD
PROPAGATION DELAY
VDD
DC Input LVDS
nQ
Q
Pulse Width
t
PERIOD
odc = t PW
t PERIOD
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
Clock
20%
Outputs
80%
tR
OUTPUT RISE/FALL TIME
VDD
out
DC Input LVDS
➤
out VOS/∆ VOS
80%
tF
20%
out
➤
100 VOD/∆ VOD
out
OFFSET VOLTAGE SETUP
85401AK
DIFFERENTIAL OUTPUT VOLTAGE SETUP
www.icst.com/products/hiperclocks.html
REV. A FEBRUARY 22, 2005
5
5 Page 
Integrated
Circuit
Systems, Inc.
ICS85401
2:1
DIFFERENTIAL-TO-LVDS MULTIPLEXER
Rev Table
A
A T8
A
REVISION HISTORY SHEET
Page
8
10
1
Description of Change
Add Schematic Layout.
Corrected count in Ordering Information Table
Pin Assignment - corrected label on pin 2.
Date
8/23/04
11/17/04
2/22/05
www.DataSheet4U.com
85401AK
www.icst.com/products/hiperclocks.html
11
REV. A FEBRUARY 22, 2005
11 Page | ||
| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet ICS85401.PDF ] | |
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