PDF ICS874005-04 Data sheet ( Hoja de datos )

Número de pieza	ICS874005-04
Descripción	PCI EXPRESS JITTER ATTENUATOR
Fabricantes	Integrated Device Technology
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No Preview Available ! PCI EXPRESS™ JITTER ATTENUATOR www.DataSheet4U.com ICS874005-04 GENERAL DESCRIPTION The ICS874005-04 is a high performance Diff- ICS erential-to-LVDS Jitter Attenuator designed for use HiPerClockS™ in PCI Express systems. In some PCI Express systems, such as those found in desktop PCs, the PCI Express clocks are generated from a low bandwidth, high phase noise PLL frequency synthesizer. In these systems, a jitter attenuator may be required to attenuate high frequency random and deterministic jitter components from the PLL synthesizer and from the system board. The ICS874005-04 has 2 PLL bandwidth modes: 300kHz and 2MHz. The 300kHz mode will provide maximum jitter attenuation, but higher PLL tracking skew and spread spectrum modulation from the motherboard synthesizer may be attenuated. The 2MHz bandwidth provides the best tracking skew and will pass most spread profiles. The ICS874005-04 supports Serdes reference clock frequencies of 100MHz, 125MHz and 250MHz. The ICS874005-04 uses IDT’s 3rd Generation FemtoClockTM PLL technology to achive the lowest possible phase noise. The device is packaged in a 24 Lead TSSOP package, making it ideal for use in space constrained applications such as PCI Express add-in cards. BLOCK DIAGRAM OEA Pullup F_SELA Pulldown BW_SEL Pulldown 0 = ~300kHz 1 = ~2MHz CLK Pulldown nCLK Pullup Phase Detector VCO 490 - 640MHz M = ÷5 (fixed) F_SELA 0 ÷5 (default) 1 ÷4 F_SELB 0 ÷2 (default) 1 ÷4 F_SELB Pulldown MR Pulldown OEB Pullup FEATURES • Five differential LVDS output pairs • One differential clock input • Supports 100MHz, 125MHz, and 250MHz Serdes reference clocks • CLK and nCLK supports the following input types: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Output frequency range: 98MHz - 320MHz • Input frequency range: 98MHz - 128MHz • PCI Express (2.5 Gb/S) and Gen 2 (5 Gb/s) jitter compliant • RMS phase jitter @ 100MHz (1.875MHz – 20MHz): 0.88ps (typical) • VCO range: 490MHz - 640MHz • Cycle-to-cycle jitter: 35ps (maximum) QA = QB = ÷4 • 3.3V operating supply • Two bandwidth modes allow the system designer to make jitter attenuation/tracking skew design trade-offs • 0°C to 70°C ambient operating temperature • Available in lead-free (RoHS 6) package PLL BANDWIDTH BW_SEL 0 = PLL Bandwidth: ~300kHz (default) 1 = PLL Bandwidth: ~2MHz QA0 nQA0 QA1 nQA1 QB0 nQB0 QB1 nQB1 QB2 nQB2 PIN ASSIGNMENT nQB2 nQA1 QA1 VDDO QA0 nQA0 MR BW_SEL VDDA F_SELA VDD OEA 1 2 3 4 5 6 7 8 9 10 11 12 24 QB2 23 VDDO 22 QB1 21 nQB1 20 QB0 19 nQB0 18 F_SELB 17 OEB 16 GND 15 GND 14 nCLK 13 CLK ICS874005-04 24-Lead TSSOP 4.40mm x 7.8mm x 0.925mm package body G Package Top View IDT™ / ICS™ PCI EXPRESS™ JITTER ATTENUATOR 1 ICS874005AG-04 REV. A JULY 29, 2008 1 page ICS874005-04 PCI EXPRESS™ JITTER ATTENUATOR www.DataSheet4U.com PARAMETER MEASUREMENT INFORMATION 3.3V±5% POWER SUPPLY + Float GND – VDD, V DDO VDDA LVDS SCOPE Qx nQx VDD nCLK CLK V PP GND Cross Points V CMR 3.3V LVDS OUTPUT LOAD AC TEST CIRCUIT nQA0, nQA1 nQB0:nQB2 QA0, QA1 QB0:QB2 tcycle n ➤ tcycle n+1 tjit(cc) = tcycle n – tcycle n+1 1000 Cycles ➤ DIFFERENTIAL INPUT LEVEL nQx Qx nQy Qy t sk(o) CYCLE-TO-CYCLE JITTER nQx Qx nQy Qy t sk(b) BANK SKEW IDT™ / ICS™ PCI EXPRESS™ JITTER ATTENUATOR OUTPUT SKEW nQA0, nQA1 nQB0:nQB2 QA0, QA1 QB0:QB2 t PW t PERIOD odc = t PW x 100% t PERIOD OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD 5 ICS874005AG-04 REV. A JULY 29, 2008 5 Page ICS874005-04 PCI EXPRESS™ JITTER ATTENUATOR RELIABILITY INFORMATION www.DataSheet4U.com TABLE 7. θ VS. AIR FLOW TABLE FOR 24 LEAD TSSOP JA θ by Velocity (Meters per Second) JA Multi-Layer PCB, JEDEC Standard Test Boards 0 82.3°C/W 1 78.0°C/W TRANSISTOR COUNT The transistor count for ICS874005-04 is: 1428 2.5 75.9°C/W PACKAGE OUTLINE AND PACKAGE DIMENSIONS PACKAGE OUTLINE - G SUFFIX FOR 24 LEAD TSSOP TABLE 8. PACKAGE DIMENSIONS SYMBOL Millimeters Minimum Maximum N 24 A -- 1.20 A1 0.05 0.15 A2 0.80 1.05 b 0.19 0.30 c 0.09 0.20 D 7.70 7.90 E 6.40 BASIC E1 4.30 4.50 e 0.65 BASIC L 0.45 0.75 α 0° 8° aaa -- 0.10 Reference Document: JEDEC Publication 95, MO-153 IDT™ / ICS™ PCI EXPRESS™ JITTER ATTENUATOR 11 ICS874005AG-04 REV. A JULY 29, 2008 11 Page

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