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PDF UPD160083 Data sheet ( Hoja de datos )
| Número de pieza | UPD160083 | |
| Descripción | 480-OUTPUT TFT-LCD SOURCE DRIVER | |
| Fabricantes | NEC | |
| Logotipo |  |
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PRELIMINARY PRODUCT INFORMATION
MOS INTEGRATED CIRCUIT
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µPD160083
480-OUTPUT TFT-LCD SOURCE DRIVER
(COMPATIBLE WITH 256-GRAY SCALES)
DESCRIPTION
The µ PD160083 is a source driver for TFT-LCDs capable of dealing with displays with 256-gray scales. Data input
is based on digital input configured as 8 bits by 3 dots (1 pixel) with double clock edge, which can realize a full-color
display of 16,777,216 colors by output of 256 values γ -corrected by an internal D/A converter and 9-by-2 external
power modules. Because the output dynamic range is as large as VSS2 + 0.1 V to VDD2 – 0.1 V, level inversion
operation of the LCD’s common electrode is rendered unnecessary. Also, to be able to deal with dot-line inversion,
n-line inversion and column line inversion when mounted on a single side, this source driver is equipped with a built-
in 8-bit D/A converter circuit whose odd output pins and even output pins respectively output gray scale voltages of
differing polarity. Assuring a clock frequency of 85 MHz when driving at 3.0 V, this driver is applicable to UXGA-
standard (1600 1200), SXGA-standard (1280 1024) TFT-LCD panels.
FEATURES
• RSDSTM (Reduced Swing Differential Signaling) interface
• 480 outputs
• Input of 8 bits (gradation data) by 3 dots with double clock edge sampling
• Capable of outputting 256 values by means of 9-by-2 external power modules (18 units) and a D/A converter
• Logic power supply voltage (VDD1): 2.7 to 3.6 V
• Driver power supply voltage (VDD2): 10.5 to 13.5 V
• Output dynamic range: VSS2 + 0.1 V to VDD2 – 0.1 V
• High-speed data transfer: fCLK = 85MHz MAX. (Internal data transfer speed when operating at VDD1 = 3.0 V)
• Apply for dot-line inversion, n-line inversion and column line inversion
• Output Voltage polarity inversion function (POL)
• Input data inversion function (INV)
• ControIable output short function (MODE1 to MODE3)
Remark RSDSTM is a trademark of National Semiconductor Corporation.
ORDERING INFORMATION
Part Number
µ PD160083N-xxx
µ PD160083NL-xxx
Package
TCP (TAB package)
COF (COF package)
Remark The TCP/COF’s external shape is customized. To order the required shape, so please contact one of our
sales representatives
The information contained in this document is being issued in advance of the production cycle for the
product. The parameters for the product may change before final production or NEC Electronics
Corporation, at its own discretion, may withdraw the product prior to its production.
Not all products and/or types are availabe in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document S16450EJ1V0PM00
Date Published May 2003 CP(K)
Printed in Japan
2002
1 page  
µ PD160083
Pin Symbol
RPI1, RPI2
RPO1, RPO2
TEST
V0-V17
VDD1D/A
VDD2
VSS1D/A
VSS2
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(2/2)
Pin Name
I/O
Description
Line-repair Amp.
Input
Output
The driver-ability of the line-repair amp is around twice of the normal analog output
S1 to S480.
And these outputs are changed at the rising edge of STB and don’t have Hi-Z
(High impedance) period.
RPI1 (RPI2) → impedance changed → RPO1 (RPO2)
Test Input TEST = H or open: Normal operation mode
TEST = L: Test mode
γ -corrected power
− Input the γ -corrected power supplies from outside by using operational amplifier.
supplies
Make sure to maintain the following relationships. During the gray scale voltage
output, be sure to keep the gray scale level power supply at a constant level.
VDD2 – 0.1 V ≥ V0 > V1 > V2 > V3 > V4 > V5 > V6 > V7 > V8 ≥ 0.5 VDD2
0.5 VDD2 ≥ V9 > V10 > V11 >V12 > V13 > V14 >V5 > V16 > V17 ≥ VSS2 + 0.1 V
Logic power supply
− 2.7 to 3.6 V
Driver power supply − 10.5 to 13.5 V
Logic ground
− Grounding
Driver ground
− Grounding
Cautions 1. The power on sequence must be VDD1D, VDD1A, logic input, and VDD2 and V0-V17 in that order.
Reverse this sequence to shut down (Simultaneous power application to VDD2 and V0-V17 is
possible.).
2. To stabilize the supply voltage, please be sure to insert a 0.1 µ F bypass capacitor between
VDD1D, VDD1A-VSS1D, VDD1A and VDD2-VSS2. Furthermore, for increased precision of the D/A
converter, insertion of a bypass capacitor of about 0.01 µF is also advised between the γ -
corrected power supply pins (V0, V1, V2, ···, V17) and VSS2.
3. Because of the large power consumption of this driver IC, it is necessary to pay attention to the
driver IC's temperature for the Junction Temperature. So, it should be considered to use the
suitable mechanical design for the heat spreading and use the LPC function and the output
reset function for the power reduction. Especially, it is recommended to measure the
temperature of the driver IC surface.
Preliminary Product Information S16450EJ1V0PM00
5
5 Page 
µ PD160083
7. TIMING CHART AND RELATIONSHIP BETWEEN 8-BIT DATA AND DATA BUS wLIwNwE.DataSheet4U.com
tHOLD2
tHOLD1
tHOLD1
CLK
(Differential)
tSETUP2
tSETUP1
tSETUP1
STHR
D00
(Differential)
D01
(Differential)
D02
(Differential)
D03
(Differential)
D10
(Differential)
D11
(Differential)
D12
(Differential)
D13
(Differential)
D20
(Differential)
D21
(Differential)
D22
(Differential)
D23
(Differential)
Remark Sn(0): LSB, Sn(7): MSB
S1 S1 S4 S4 S7 S7
(0) (1) (0) (1) (0) (1)
S1 S1 S4 S4 S7 S7
(2) (3) (2) (3) (2) (3)
S1 S1 S4 S4 S7 S7
(4) (5) (4) (5) (4) (5)
S1 S1 S4 S4 S7 S7
(6) (7) (6) (7) (6) (7)
S2 S2 S5 S5 S8 S8
(0) (1) (0) (1) (0) (1)
S2 S2 S5 S5 S8 S8
(2) (3) (2) (3) (2) (3)
S2 S2 S5 S5 S8 S8
(4) (5) (4) (5) (4) (5)
S2 S2 S5 S5 S8 S8
(6) (7) (6) (7) (6) (7)
S3 S3 S6 S6 S9 S9
(0) (1) (0) (1) (0) (1)
S3 S3 S6 S6 S9 S9
(2) (3) (2) (3) (2) (3)
S3 S3 S6 S6 S9 S9
(4) (5) (4) (5) (4) (5)
S3 S3 S6 S6 S9 S9
(6) (7) (6) (7) (6) (7)
Preliminary Product Information S16450EJ1V0PM00
11
11 Page | ||
| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet UPD160083.PDF ] | |
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