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Número de pieza | K6F3216U6M | |
Descripción | 2M x16 bit Super Low Power and Low Voltage Full CMOS Static RAM | |
Fabricantes | Samsung semiconductor | |
Logotipo | ||
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Document Title
2M x16 bit Super Low Power and Low Voltage Full CMOS Static RAM
Revision History
Revision No. History
0.0 Initial draft
0.1 Revised
- Changed ICC2 from 35mA to 40mA for 55ns product
from 25mA to 35mA for 70ns product
- Changed ISB1 from 30µA to 40µA
- Changed IDR from 15µA to 20µA
1.0 Finalize
Draft Date
January 31, 2002
July 30, 2002
Remark
Preliminary
Preliminary
December 18, 2002 Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
1 Revision 1.0
December 2002
1 page K6F3216U6M Family
CMwwOwS.DaStaSRheAetM4U.com
AC OPERATING CONDITIONS
VTM3)
TEST CONDITIONS(Test Load and Input/Output Reference)
Input pulse level: 0.4 to 2.2V
Input rising and falling time: 5ns
Input and output reference voltage:1.5V
Output load(see right): CL=100pF+1TTL
CL=30pF+1TTL
CL1)
R12)
R22)
1. Including scope and jig capacitance
2. R1=3070Ω, R2=3150Ω
3. VTM =2.8V
AC CHARACTERISTICS ( Vcc=2.7~3.3V, Industrial product:TA=-40 to 85°C )
Parameter List
Symbol
Read
Write
Read cycle time
Address access time
Chip select to output
Output enable to valid output
UB, LB valid to data output
Chip select to low-Z output
UB, LB enable to low-Z output
Output enable to low-Z output
Chip disable to high-Z output
UB, LB disable to high-Z output
Output disable to high-Z output
Output hold from address change
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
UB, LB Valid to End of Write
Write pulse width
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
tRC
tAA
tCO1, tCO2
tOE
tBA
tLZ1, tLZ2
tBLZ
tOLZ
tHZ1, tHZ2
tBHZ
tOHZ
tOH
tWC
tCW1, tCW2
tAS
tAW
tBW
tWP
tWR
tWHZ
tDW
tDH
tOW
Speed
55ns
70ns
Min Max Min Max
55 - 70 -
- 55 - 70
- 55 - 70
- 25 - 35
- 55 - 70
10 - 10 -
10 - 10 -
5 - 5-
0 20 0 25
0 20 0 25
0 20 0 25
10 - 10 -
55 - 70 -
45 - 60 -
0 - 0-
45 - 60 -
45 - 60 -
40 - 50 -
0 - 0-
0 20 0 20
25 - 30 -
0 - 0-
5 - 5-
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DATA RETENTION CHARACTERISTICS
Item
Vcc for data retention
Data retention current
Data retention set-up time
Recovery time
Symbol
VDR
IDR
tSDR
tRDR
1. 1) CS1≥Vcc-0.2V, CS2≥Vcc-0.2V(CS1 controlled) or
2) 0≤CS2≤0.2V(CS2 controlled)
Test Condition
CS1≥Vcc-0.2V1), VIN≥0V
Vcc=1.5V, CS1≥Vcc-0.2V1), VIN≥0V
See data retention waveform
Min Typ Max Unit
1.5 - 3.3 V
- - 20 µA
0-
tRC -
- ns
-
5 Revision 1.0
December 2002
5 Page |
Páginas | Total 9 Páginas | |
PDF Descargar | [ Datasheet K6F3216U6M.PDF ] |
Número de pieza | Descripción | Fabricantes |
K6F3216U6M | 2M x16 bit Super Low Power and Low Voltage Full CMOS Static RAM | Samsung semiconductor |
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