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PDF GTL2014 Data sheet ( Hoja de datos )
| Número de pieza | GTL2014 | |
| Descripción | 4-bit LVTTL to GTL transceiver | |
| Fabricantes | NXP Semiconductors | |
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GTL2014
4-bit LVTTL to GTL transceiver
Rev. 01 — 19 May 2005
www.DataSheet4U.com
Product data sheet
1. General description
The GTL2014 is a 4-bit translating transceiver designed for 3.3 V LVTTL system interface
with a GTL−/GTL/GTL+ bus.
The direction pin allows the part to function as either a GTL to LVTTL sampling receiver or
as a LVTTL to GTL interface.
The GTL2014 LVTTL inputs (only) are tolerant up to 5.5 V allowing direct access to TTL or
5 V CMOS inputs. The LVTTL outputs are not 5.5 V tolerant.
The GTL2014 GTL inputs and outputs operate up to 3.6 V, allowing the device to be used
in higher voltage open-drain output applications.
2. Features
s Operates as a 4-bit GTL−/GTL/GTL+ sampling receiver or as a LVTTL to
GTL−/GTL/GTL+ driver
s 3.0 V to 3.6 V operation with 5 V tolerant LVTTL input
s GTL input and output 3.6 V tolerant
s Vref adjustable from 0.5 V to VCC/2
s Partial power-down permitted
s ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-CC101
s Latch-up protection exceeds 500 mA per JESD78
s Package offered: TSSOP14
3. Quick reference data
Table 1: Quick reference data
Tamb = 25 °C
Symbol Parameter
tPLH propagation delay; An-to-Bn
tPHL
tPLH propagation delay; Bn-to-An
tPHL
Ci input capacitance on pin DIR;
A-to-B or B-to-A
Cio input/output capacitance; A-to-B
input/output capacitance; B-to-A
Conditions
CL = 50 pF; VCC = 3.3 V
CL = 50 pF; VCC = 3.3 V
VI = 0 V or VCC
outputs disabled;
VI and VO = 0 V or 3.0 V
Min Typ
- 2.8
- 3.4
- 5.2
- 4.9
-2
- 4.6
- 3.4
Max Unit
- ns
- ns
- ns
- ns
2.5 pF
6.0 pF
4.3 pF
1 page  
Philips Semiconductors
GTL2014www.DataSheet4U.com
4-bit LVTTL to GTL transceiver
9. Recommended operating conditions
Table 7: Operating conditions [1]
Symbol Parameter
Conditions
VCC supply voltage
VTT termination
voltage [2]
GTL−
GTL
GTL+
Vref reference voltage overall
GTL−
GTL
GTL+
VI
input voltage
B port
except B port
VIH HIGH-level input B port
voltage
except B port
VIL LOW-level input B port
voltage
except B port
IOH HIGH-level output A port
current
IOL LOW-level output B port
current
A port
Tamb
operating ambient in free-air
temperature
Min
3.0
0.85
1.14
1.35
0.5
0.5
0.76
0.87
0
0
Vref + 0.050
2
-
-
-
Typ
-
0.9
1.2
1.5
2⁄3VTT
0.6
0.8
1.0
VTT
3.3
-
-
-
-
-
Max
3.6
0.95
1.26
1.65
VCC/2
0.63
0.84
1.10
3.6
5.5 [3]
-
-
Vref − 0.050
0.8
−16
- - 40
- - 16
−40 - +85
[1] Unused inputs must be held HIGH or LOW to prevent them from floating.
[2] VTT maximum of 3.6 V with resistor sized so IOL maximum is not exceeded.
[3] A0, A1, A2, A3 VI(max) is 3.6 V if configured as outputs (DIR = L).
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
mA
mA
mA
°C
9397 750 13534
Product data sheet
Rev. 01 — 19 May 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
5 of 15
5 Page 
Philips Semiconductors
GTL2014www.DataSheet4U.com
4-bit LVTTL to GTL transceiver
14. Soldering
14.1 Introduction to soldering surface mount packages
This text gives a very brief insight to a complex technology. A more in-depth account of
soldering ICs can be found in our Data Handbook IC26; Integrated Circuit Packages
(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface mount IC packages. Wave
soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch
SMDs. In these situations reflow soldering is recommended.
14.2 Reflow soldering
Reflow soldering requires solder paste (a suspension of fine solder particles, flux and
binding agent) to be applied to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement. Driven by legislation and
environmental forces the worldwide use of lead-free solder pastes is increasing.
Several methods exist for reflowing; for example, convection or convection/infrared
heating in a conveyor type oven. Throughput times (preheating, soldering and cooling)
vary between 100 seconds and 200 seconds depending on heating method.
Typical reflow peak temperatures range from 215 °C to 270 °C depending on solder paste
material. The top-surface temperature of the packages should preferably be kept:
• below 225 °C (SnPb process) or below 245 °C (Pb-free process)
– for all BGA, HTSSON..T and SSOP..T packages
– for packages with a thickness ≥ 2.5 mm
– for packages with a thickness < 2.5 mm and a volume ≥ 350 mm3 so called
thick/large packages.
• below 240 °C (SnPb process) or below 260 °C (Pb-free process) for packages with a
thickness < 2.5 mm and a volume < 350 mm3 so called small/thin packages.
Moisture sensitivity precautions, as indicated on packing, must be respected at all times.
14.3 Wave soldering
Conventional single wave soldering is not recommended for surface mount devices
(SMDs) or printed-circuit boards with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering method was specifically
developed.
If wave soldering is used the following conditions must be observed for optimal results:
• Use a double-wave soldering method comprising a turbulent wave with high upward
pressure followed by a smooth laminar wave.
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be
parallel to the transport direction of the printed-circuit board;
9397 750 13534
Product data sheet
Rev. 01 — 19 May 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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