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PDF MAX3991 Data sheet ( Hoja de datos )
| Número de pieza | MAX3991 | |
| Descripción | 10Gbps Clock and Data Recovery | |
| Fabricantes | Maxim Integrated Products | |
| Logotipo |  |
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19-3486; Rev 0; 11/04
www.DataSheet4U.com
10Gbps Clock and Data Recovery
with Limiting Amplifier
General Description
The MAX3991 is a 10Gbps clock and data recovery
(CDR) with limiting amplifier IC for XFP optical receivers.
The MAX3991 and the MAX3992 (CDR with equalizer)
form a signal conditioner chipset for use in XFP trans-
ceiver modules. The chipset is XFI compliant and offers
multirate operation for data rates from 9.95Gbps to
11.1Gbps.
The MAX3991 has 7mVP-P input sensitivity (BER ≤ 10-12),
which allows direct connection to a transimpedance
amplifier without the use of a stand-alone limiting amplifi-
er. The phase-locked loop (PLL) is optimized for jitter tol-
erance and provides 0.6UI of high-frequency tolerance
in SONET, Ethernet, and Fibre-Channel applications. The
MAX3991 output provides 27% margin to the XFP eye
mask specification.
An AC-based power detector toggles the loss-of-signal
(LOS) output when the input signal swing is below the
user-programmed assert threshold. An external refer-
ence clock, with frequency equal to 1/64 or 1/16 of the
serial data rate is used to aid in frequency acquisition. A
loss-of-lock (LOL) indicator is provided to indicate the
lock status of the receiver PLL.
The MAX3991 is available in a 4mm x 4mm, 24-pin QFN
package. It consumes 350mW from a single +3.3V supply
and operates over the 0°C to +85°C temperature range.
Features
♦ Multirate Operation from 9.95Gbps to 11.1Gbps
♦ 7mVP-P Input Sensitivity (BER ≤ 10-12)
♦ 0.6UIP-P Total High-Frequency Jitter Tolerance
♦ Low-Output Jitter Generation: 7mUIRMS
♦ Low-Output Deterministic Jitter: 4.6psP-P
♦ XFI-Compliant Output Interface
♦ LOS Indicator with Programmable Threshold
♦ LOL Indicator
♦ Power Dissipation: 350mW
Ordering Information
PART
TEMP RANGE PIN-
PACKAGE
MAX3991UTG
0°C to +85°C 24 QFN
MAX3991UTG+* 0°C to +85°C 24 QFN
*Future product—contact factory for availability.
+Denotes lead-free package.
PKG
CODE
T2444-4
T2444-4
Applications
9.95Gbps to 11.1Gbps Optical XFP Modules
SONET OC-192/SDH STM-64 XFP Transceivers
10.3Gbps/11.1Gbps Ethernet XFP Transceivers
10.5Gbps Fibre-Channel XFP Transceivers
10Gbps DWDM Transceivers
Typical Application Circuit appears at end of data sheet.
TOP VIEW
Pin Configuration
24 23 22 21 20 19
VCC 1
18 VCC
GND 2
17 GND
SDI+ 3
SDI- 4
MAX3991
16 SDO+
15 SDO-
GND 5
14 GND
VCC 6
13 VCC
7 8 9 10 11 12
4mm x 4mm QFN*
*THE EXPOSED PAD MUST BE CONNECTED TO CIRCUIT-BOARD GROUND FOR
PROPER THERMAL AND ELECTRICAL PERFORMANCE.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page  
www.DataSheet4U.com
10Gbps Clock and Data Recovery
with Limiting Amplifier
∆f/fREFCLK
651ppm
500ppm
LOL
ASSERT TIME
LOL
*ASSERT AND ACQUISITION TIME ARE DEFINED
WITH A VALID REFERENCE CLOCK APPLIED.
Figure 1. RX LOL Assert and PLL Acquisition Time
ACQUISITION
TIME
DATA INPUT
POWER
LOS ASSERT TIME
LOS DEASSERT TIME
LOS
LOL
Figure 2. LOS Assert/Deassert Time
ACQUISITION TIME
_______________________________________________________________________________________ 5
5 Page 
www.DataSheet4U.com
10Gbps Clock and Data Recovery
with Limiting Amplifier
VCC
50Ω 50Ω
SDO+
SDO-
GND
Figure 7. CML Output Model
(SDI+) - (SDI-)
(SDO+) - (SDO-)
POL = VCC
(SDO+) - (SDO-)
POL = GND
Figure 8. Polarity (POL) Function
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet MAX3991.PDF ] | |
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