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RD74LVC16374B fiches techniques PDF

Renesas Technology - 16-bit D-type Flip Flops

Numéro de référence RD74LVC16374B
Description 16-bit D-type Flip Flops
Fabricant Renesas Technology 
Logo Renesas Technology 





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RD74LVC16374B fiche technique
RD74LVC16374B
www.DataSheet4U.com
16-bit D-type Flip Flops with 3-state Outputs
Description
REJ03D0501–0100
Rev.1.00
Jan. 24, 2005
The RD74LVC16374B has sixteen edge trigger D type flip flops with three state outputs in a 48 pin package. Data at
the D inputs meeting set up requirements are transferred to the Q outputs on positive going transitions of the clock
input. When the latch enable goes low, data at the D inputs will be retained at the outputs until latch enable returns high
again. When a high logic level is applied to the output control input, all outputs go to a high impedance state, regardless
of what signals are present at the other inputs and the state of the storage elements. Low voltage and high-speed
operation is suitable at the battery drive product (note type personal computer) and low power consumption extends the
life of a battery for long time operation.
Features
VCC = 1.65 V to 5.5 V
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VOUT (Max.) = 5.5 V (@VCC = 0 V or output off state)
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
High output current ±4 mA (@VCC = 1.65 V)
±8 mA (@VCC = 2.3 V)
±12 mA (@VCC = 2.7 V)
±24 mA (@VCC = 3.0 V to 5.5 V)
Ordering Information
Part Name
Package Type
Package Code
Package
(Previous Code) Abbreviation
RD74LVC16374BTEL TSSOP–48 pin
PTSP0048KA–A T
(TTP–48DBV)
Taping Abbreviation
(Quantity)
EL (1,000 pcs/reel)
Function Table
Inputs
G CK D
HXX
LL
L H
LLX
H: High level
L: Low level
X: Immaterial
Z: High impedance
: Low to high transition
Q0: Level of Q before the indicated steady input conditions were established.
Output Q
Z
L
H
Q0
Rev.1.00 Jan. 24, 2005 page 1 of 8

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