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PDF RD74LVC125B Data sheet ( Hoja de datos )

Número de pieza RD74LVC125B
Descripción Quad. Bus Buffer Gates
Fabricantes Renesas Technology 
Logotipo Renesas Technology Logotipo



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RD74LVC125B
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Quad. Bus Buffer Gates with 3-state Outputs
REJ03D0498–0200
Rev.2.00
Dec. 10, 2004
Description
The RD74LVC125B has four bus buffer gates in a 14 pin package. The device requires the three state control input OE
to be taken high to put the output into the high impedance condition. Low voltage and high-speed operation is suitable
at the battery drive product (note type personal computer) and low power consumption extends the life of a battery for
long time operation.
Features
VCC = 1.65 V to 5.5 V
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VOUT (Max.) = 5.5 V (@VCC = 0 V or output off state)
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
High output current ±4 mA (@VCC = 1.65 V)
±8 mA (@VCC = 2.3 V)
±12 mA (@VCC = 2.7 V)
±24 mA (@VCC = 3.0 V to 5.5 V)
Ordering Information
Part Name
Package Type
Package Code
RD74LVC125BFPEL
RD74LVC125BTELL
SOP–14 pin (JEITA)
TSSOP–14 pin
FP–14DAV
TTP–14DV
Package
Abbreviation
FP
T
Taping Abbreviation
(Quantity)
EL (2,000 pcs/reel)
ELL (2,000 pcs/reel)
Function Table
OE
H
L
L
H: High level
L: Low level
X: Immaterial
Z: High impedance
Inputs
X
L
H
A
Outputs Y
Z
L
H
Rev.2.00 Dec. 10, 2004 page 1 of 8

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RD74LVC125B pdf
RD74LVC125B
Switching Characteristics
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Ta = –40 to 85°C
Item
Symbol VCC (V)
Min
Typ
Max
Propagation delay time
tPLH
tPHL
1.8±0.15 1.0
2.5±0.2 1.0
12.3
6.3
2.7
1.0 —
5.5
3.3±0.3 1.0
4.8
5.0±0.5 1.0
3.8
Output enable time
tZH
1.8±0.15 1.0
14.3
tZL
2.5±0.2 1.0
7.4
2.7
1.0 —
6.6
3.3±0.3 1.0
5.4
5.0±0.5 1.0
4.4
Output disable time
tHZ
1.8±0.15 1.0
11.1
tLZ
2.5±0.2 1.0
5.6
2.7
1.0 —
5.0
3.3±0.3 1.0
4.6
Between output pins skew *1 tOSLH
tOSHL
5.0±0.5
1.8±0.15
2.5±0.2
1.0
3.6
2.7 — — —
3.3±0.3 — — 1.0
5.0±0.5 — — 1.0
Input capacitance
Output capacitance
CIN 3.3
CO 3.3
— 4.0 —
— 7.0 —
Note: 1. This parameter is characterized but not tested.
tosLH = | tPLHm - tPLHn|, tosHL = | tPHLm - tPHLn|
Unit
ns
ns
ns
ns
pF
pF
From
(Input)
A
To
(Output)
Y
OE Y
OE Y
Operating Characteristics
Item
Power dissipation
capacitance
Ta = 25°C
Symbol VCC (V) Min Typ Max
Unit Test conditions
CPD 1.8
— 21
— pF f = 10 MHz
2.5 — 22
3.3 — 23
5.0 — 27
Rev.2.00 Dec. 10, 2004 page 5 of 8

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