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PDF EMIF02-MIC02F2 Data sheet ( Hoja de datos )

Número de pieza EMIF02-MIC02F2
Descripción 2-line IPAD EMI filter and ESD protection
Fabricantes STMicroelectronics 
Logotipo STMicroelectronics Logotipo



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EMIF02-MIC02F2
2-line IPAD™, EMI filter and ESD protection
Features
EMI symmetrical (I/O) low-pass filter
High efficiency in EMI filtering
Lead free package
Very low PCB space consuming:
1.42 mm x 0.92 mm
Very thin package: 0.65 mm
High efficiency in ESD suppression
High reliability offered by monolithic integration
High reducing of parasitic elements through
integration and wafer level packaging
Complies with the following standards
IEC 61000-4-2 level 4 on input pins
– 15 kV (air discharge)
– 8 kV (contact discharge)
IEC 61000-4-2 level 1 on input pins
– 2 kV (air discharge)
– 2 kV (contact discharge)
Applications
Where EMI filtering in ESD sensitive equipment is
required:
Mobile phones and communication systems
Computers, printers and MCU Boards
Description
The EMIF02-MIC02 is a highly integrated devices
designed to suppress EMI/RFI noise in all
systems subjected to electromagnetic
interferences. The EMIF02 Flip Chip packaging
means the package size is equal to the die size.
This filter includes an ESD protection circuitry
which prevents the device from destruction when
subjected to ESD surges up 15 kV.
Flip Chip
(6 bumps)
Figure 1. Pin configuration (bump side)
32
1
I2 GND
I1
A
O2 GND
O1
B
Figure 2. Basic cell configuration
Input
Low-pass Filter
GND
GND
Output
Ri/o = 470 W
Cline = 16 pF
GND
TM: IPAD is a trademark of STMicroelectronics.
April 2008
Rev 3
1/8
www.st.com
8

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EMIF02-MIC02F2 pdf
EMIF02-MIC02F2
3 Ordering information scheme
Figure 11. Ordering information scheme
Ordering infworwmwa.DtiaotanSshecehte4Um.ceom
EMIF yy - xxx zz Fx
EMI Filter
Number of lines
Information
x = resistance value (Ohms)
z = capacitance value / 10 pF
or
3 letters = application
2 digits = version
Package
F = Flip Chip
x = 2: Lead-free, pitch = 500 µm, bump = 315 µm
4 Package information
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a lead-free second level interconnect. The category of
second level interconnect is marked on the inner box label, in compliance with JEDEC
Standard JESD97. The maximum ratings related to soldering conditions are also marked on
the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at
www.st.com.
Figure 12. Package dimensions
500 µm ± 50
315 µm ± 50
650µm ± 65
210 µm
0.92 mm ± 50µm
5/8

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