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PDF IDT5V2310 Data sheet ( Hoja de datos )

Número de pieza IDT5V2310
Descripción 2.5V TO 3.3V HIGH PERFORMANCE CLOCK BUFFER
Fabricantes Integrated Device Technology 
Logotipo Integrated Device Technology Logotipo



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No Preview Available ! IDT5V2310 Hoja de datos, Descripción, Manual

IDT5V2310
2.5V TO 3.3V HIGH PERFORMANCE CLOCK BUFFER
2.5V TO 3.3V HIGH
PERFORMANCE CLOCK
BUFFER
INDUSTRIALTEMPERATURERANGE
www.DataSheet4U.com
IDT5V2310
ADVANCE
INFORMATION
FEATURES:
• High performance 1:10 clock driver for general purpose
applications
• Operates up to 200MHz at VDD = 3.3V
• Pin-to-pin skew < 50ps
• VDD range: 2.3V to 3.6V
• Output enable glitch suppression
• Distributes one clock input to two banks of five outputs
• 25on-chip series dampening resistors
• Available in TSSOP and VFQFPN packages
DESCRIPTION:
The IDT5V2310 is a high performance, low skew clock buffer that
operates up to 200MHz. Two banks of five outputs each provide low skew
copies of CLK. Through the use of control pins 1G and 2G, the outputs of
banks 1Y(0:4) and 2Y(0:4) can be placed in a low state regardless of CLK
input. The device operates in 2.5V and 3.3V environments. The built-in
output enable glitch suppression ensures a synchronized output enable
sequence to distribute full period clock signals.
The IDT5V2310 is characterized for operation from -40°C to +85°C.
FUNCTIONAL BLOCK DIAGRAM
11
1G
13
2G
LOGIC CONTROL
LOGIC CONTROL
CLK
24
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
c 2003 Integrated Device Technology, Inc.
1
3
25
1Y0
4
25
1Y1
5
25
1Y2
8
25
1Y3
9
25
1Y4
21
2Y0
25
20
2Y1
25
17
2Y2
25
16
2Y3
25
12
2Y4
25
JUNE 2003
DSC 6173/17

1 page




IDT5V2310 pdf
IDT5V2310
2.5V TO 3.3V HIGH PERFORMANCE CLOCK BUFFER
INDUSTRIALTEMPERATURERANGE
www.DataSheet4U.com
SWITCHING CHARACTERISTICS OVER OPERATING RANGE -
VDD = 3.3V ± 0.3V(1)
Symbol
Parameter
Test Conditions
Min. Typ.(1)
tPLH CLK to Yx
f = 0MHz to 200MHz
1.3
tPHL
tSK(O)(2)
Output Skew, Yx to Yx
tSK(P)
tSK(PP)
Pulse Skew
Part-to-Part Skew
tR RiseTime
VO = 0.4V to 2V
0.7
tF FallTime
tSU G before CLK
tH G after CLK
VO = 2V to 0.4V
V(THRESHOLD) = VDD/2
0.7
0.1
0.4
NOTES:
1. All typical values are at respective nominal VDD.
2. This specification is only valid for equal loading of all outputs.
Max
2.8
100
250
500
2
2
Unit
ns
ps
ps
ps
V/ns
V/ns
ns
SWITCHING CHARACTERISTICS OVER OPERATING RANGE -
VDD = 2.5V ± 0.2V(1)
Symbol
Parameter
Test Conditions
Min. Typ.(1)
tPLH CLK to Yx
f = 0MHz to 170MHz
1.5
tPHL
tSK(O)(2)
Output Skew, Yx to Yx
tSK(P) Pulse Skew
tSK(PP)
tR
Part-to-Part Skew
Rise Time
VO = 0.4V to 1.7V
0.5
tF FallTime
VO = 1.7V to 0.4V
0.5
tSU G before CLK
tH G after CLK
V(THRESHOLD) = VDD/2
0.1
0.4
NOTES:
1. All typical values are at respective nominal VDD.
2. This specification is only valid for equal loading of all outputs.
Max
3.5
100
400
600
1.4
1.4
Unit
ns
ps
ps
ps
V/ns
V/ns
ns
5

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