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PDF PCA24S08 Data sheet ( Hoja de datos )

Número de pieza PCA24S08
Descripción 1024 x 8-bit CMOS EEPROM
Fabricantes NXP Semiconductors 
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No Preview Available ! PCA24S08 Hoja de datos, Descripción, Manual

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PCA24S08
1024 × 8-bit CMOS EEPROM
with access protection
Product data
2004 May 10
Philips
Semiconductors

1 page




PCA24S08 pdf
Philips Semiconductors
1024 × 8-bit CMOS EEPROM with access protection
Product data
wwwP.DCataASh2e4etS4U0.c8om
The general command encoding used by the serial port for
EEPROM accesses is shown below in Device Access Examples,
where B2-0 is the block number, P2-0 is the page number within the
block and A3-0 is the byte address within the page. Bits denoted as
“x” are ignored by the device.
ACKNOWLEDGE
FROM SLAVE
ACKNOWLEDGE
FROM SLAVE
S 1 0 1 0 1 B2 B1 0 A B0 P2 P1 P0 A3 A2 A1 A0 A
WORD R/W
ADDRESS
WORD
ADDRESS
ACKNOWLEDGE
FROM SLAVE
DATA
A
AUTO INCREMENT
WORD ADDRESS
Figure 5. Auto-increment memory word address; two byte write
DATA
AP
AUTO INCREMENT
WORD ADDRESS
SW02103
Page write: The PCA24S08 is capable of a 16-byte page write
operation. It is initiated in the same manner as the byte write
operation. The master can transit 16 data bytes within one
transmission. After receipt of each byte, the PCA24S08 will respond
with an acknowledge. The typical E/W time in this mode is 5 ms.
After the receipt of each data byte, the four low-order bits of the
word address are internally incremented. The six high-order bits of
the address remain unchanged. The slave acknowledges the
reception of each data byte with an ACK. The I2C-bus data transfer
is terminated by the master after the 16th byte of data with a STOP
condition. After a write to the last byte in a page, the internal
address is wrapped around to point to the beginning of that page. If
the master transmits more than 16 bytes prior to generating the
STOP condition, no acknowledge will be given on the 17th (and
following) data bytes and the whole transmission will be ignored and
no programming will be done. As in the byte write operation, all
inputs are disabled until completion of the internal write cycles.
After this STOP condition, the E/W cycle starts and the I2C-bus is
free for another transmission.
During the E/W cycle the slave receiver does not acknowledge if
addressed via the I2C-bus.
ACKNOWLEDGE
FROM SLAVE
ACKNOWLEDGE
FROM SLAVE
ACKNOWLEDGE
FROM SLAVE
S 1 0 1 0 1 B2 B1 0 A B0 P2 P1 P0 A3 A2 A1 A0 A
WORD R/W
ADDRESS
WORD
ADDRESS
DATA
A
DATA + 1
AP
AUTO INCREMENT
WORD ADDRESS
AUTO INCREMENT
WORD ADDRESS
ACKNOWLEDGE
FROM SLAVE
DATA + 15
AA
Figure 6. Page write operation: 16 bytes
LAST BYTE
AUTO INCREMENT
WORD ADDRESS
SW02104
2004 May 10
5

5 Page





PCA24S08 arduino
Philips Semiconductors
1024 × 8-bit CMOS EEPROM with access protection
Product data
wwwP.DCataASh2e4etS4U0.c8om
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation under these conditions is not implied.
SYMBOL
PARAMETER
voltage on VDD with respect to ground
voltage on SDA, SCL, PROT, and WP
Tstg
Tamb
storage temperature
operating temperature
MIN
–0.1 to VDD
–55
–40
MAX
4.6
+0.3
+125
+85
UNIT
V
V
_C
_C
DC ELECTRICAL CHARACTERISTICS
VDD = 2.5 V to 3.6 V; VSS = 0 V; Tamb = –40 °C to +85 °C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
VDD
IDDR
IDDW
Istb
ILIO
ILWP
VIL
VIH
VOL
CI
CIO
supply voltage
supply current, EEPROM reads
supply current, EEPROM writes
standby current
input/output current, PROT, SDA, SCL
input current on WP
LOW-level input voltage
HIGH-level input voltage
LOW-level output voltage
input capacitance
input/output capacitance
VDD = 3.6 V; fSDA = 100 kHz
VDD = 3.6 V; fSDA = 100 kHz
VDD = 3.6 V; SDA, SCL = VSS
VIN = VDD or VSS
VWP = VDD = 5.5 V
IOL = 2.1 mA
SCL, PROT, WP not tested
SDA not tested
MIN
2.5
–0.1
VDD × 0.7
TYP
50
0.325
11.4
0.25
MAX
3.6
100
1.0
15
3.0
20
VDD × 0.3
VDD
0.4
6
8
UNIT
V
µA
mA
µA
µA
µA
V
V
V
pF
pF
2004 May 10
11

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