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PDF LC74798 Data sheet ( Hoja de datos )
| Número de pieza | LC74798 | |
| Descripción | On-Screen Display Controller IC | |
| Fabricantes | Sanyo Semicon Device | |
| Logotipo |  |
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Ordering number : EN5833
CMOS IC
LC74798, 74798M
On-Screen Display Controller IC
Overview
The LC74798 and LC74798M are on-screen display
controller CMOS ICs that display characters and patterns
on the TV screen under microprocessor control. These ICs
include a built-in PDC/VPS/UDT interface circuit.
Features
• Display format: 24 characters by 12 rows (Up to 288
characters)
• Character format: 12 (horizontal) × 18 (vertical) dots
• Character sizes: Three sizes each in the horizontal and
vertical directions
• Characters in font: 128
• Initial display positions: 64 horizontal positions and
64 vertical positions
• Blinking: Specifiable in character units
• Blinking types: Two periods supported: 1.0 second and
0.5 second
• Blanking: Over the whole font (12 × 18 dots)
• Background color
— 8 colors (internal synchronization mode): 4fSC
— 6 colors (internal synchronization mode): 2fSC
— Blue background only: NTSC
• Line background color
— Three lines can be set up.
— 8 line background colors (in internal synchronization
mode): 4fSC
— 6 line background colors (in internal synchronization
mode): 2fSC
• External control input: 8-bit serial input format
• On-chip sync separator and AFC circuits
• On-chip PDC/VPS/UDT interface circuit
• Video outputs: PAL and NTSC format composite video
outputs
• Package: DIP30SD (400 mil)
MFP30S (375 mil)
Package Dimensions
unit: mm
3193-DIP30SD
[LC74798]
unit: mm
3216-MFP30S
[LC74798M]
SANYO: DIP30SD
SANYO: MFP30S
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
51898RM (OT) No. 5833-1/32
1 page  
Continued from preceding page.
LC74798, 74798M
Parameter
Symbol
Conditions
Background color low level
VRSL
CVOUT : VDD1 = 5.0 V,
VDD2 = 5.0 V
(1)
(2)
(3)
Background color high level
VRSH
CVOUT : VDD1 = 5.0 V,
VDD2 = 5.0 V
(1)
(2)
(3)
Frame level 0
VBK0
CVOUT : VDD1 = 5.0 V,
VDD2 = 5.0 V
(1)
(2)
(3)
Frame level 1
VBK1
CVOUT : VDD1 = 5.0 V,
VDD2 = 5.0 V
(1)
(2)
(3)
Character level
VCHA
CVOUT : VDD1 = 5.0 V,
VDD2 = 5.0 V
(1)
(2)
(3)
Notes: (1): When the sync level = 0.8 V
(2): When the sync level = 1.0 V
(3): When the sync level = 1.4 V
The values in parentheses for the background high and low levels are for blue background mode.
Timing Characteristics at Ta = –30 to +70°C, VDD1 = 5 ±0.5 V
Parameter
Symbol
Conditions
OSD write (See figure 1.)
Minimum input pulse width
tW (SCLK) SCLK1
tW (CS1) CS1 (The period when CS1 is high)
Data setup time
tSU (CS1) CS1
tSU (SIN) SIN1
Data hold time
th (CS1)
th (SIN)
CS1
SIN1
One word write time
tword
twt
The 8-bit data write time
The RAM data write time
PDC/VPS write (For the n-channel open-drain output circuit type. See figure 2)
Minimum input pulse width
Setup time
Output delay time
tCKCY
tCKL
tCKH
tICK
tCKO
SCLK2
SCLK2
SCLK2
SCLK2
DOUT
Note: The OSD timing applies when the CMOS output circuit type is used.
Ratings
min typ max
1.23 (1.16)
1.43 (1.36)
1.83 (1.76)
2.37 (2.01)
2.57 (2.21)
2.97 (2.61)
1.50
1.70
2.10
2.08
2.28
2.68
2.65
2.85
3.25
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
Ratings
Unit
min typ max
200 ns
1 µs
200 ns
200 ns
2 µs
200 ns
4.2 µs
1 µs
2 µs
1 µs
1 µs
10 µs
0.5 µs
No. 5833-5/32
5 Page 
LC74798, 74798M
COMMAND3 (Horizontal display start position and horizontal size setup command)
• First byte
DA
0 to 7
7
6
5
4
Register
—
—
—
—
3 HS21
2 HS20
1 HS11
0 HS10
State
1
0
1
0
0
1
0
1
0
1
0
1
Contents
Function
Command 3 identification code.
Sets the horizontal display start position and the horizontal character
size.
HS21
HS20
0
1
HS11
HS10
0
1
0
1Tc/dot
3Tc/dot
0
1Tc/dot
3Tc/dot
1
2Tc/dot
1Tc/dot
1
2Tc/dot
1Tc/dot
Notes
Second line horizontal character size
First line horizontal character size
• Second byte
DA
0 to 7
Register
State
Contents
Function
7—
0 Second byte identification bit
6—
0
HP5
5
(MSB)
0
1
4 HP4
3 HP3
2 HP2
1 HP1
0
1
0 If HS is the horizontal start position then:
( )1
HS = Tc ×
2
5
∑
2n
VPn
0 n=0
1 Tc: Period of the oscillator in operating mode.
0
1
HP0
0
(LSB)
0
1
Note: All registers are set to 0 when the LC74798/M is reset by the RST pin.
Notes
The horizontal display start position is set by the 6
bits HP0 to HP5.
The weight of bit 1 is 2Tc.
No. 5833-11/32
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet LC74798.PDF ] | |
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