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What is IDT5T929?

This electronic component, produced by the manufacturer "Integrated Device Technology", performs the same function as "PRECISION CLOCK GENERATOR OC-48 APPLICATIONS".


IDT5T929 Datasheet PDF - Integrated Device Technology

Part Number IDT5T929
Description PRECISION CLOCK GENERATOR OC-48 APPLICATIONS
Manufacturers Integrated Device Technology 
Logo Integrated Device Technology Logo 


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IDT5T929
PRECISION CLOCK GENERATOR OC-48 APPLICATIONS
INDUSTRIALTEMPERATURERANGE
www.DataSheet4U.com
PRECISION CLOCK GENERATOR
IDT5T929
OC-48 APPLICATIONS
FEATURES:
• Input frequency:
- For SONET non-FEC: 19.44MHz, 38.88MHz, 77.76MHz, 155.52MHz,
311.04MHz, or 622.08MHz
- For SONET FEC: 20.83MHz, 41.66MHz, 83.31MHz, 166.63MHz,
333.26MHz, or 666.52MHz
- For 10GE copper: 19.53MHz, 39.06MHz, 78.125MHz, 156.25MHz,
312.5MHz, or 625MHz
- For 10GE optical: 20.14MHz, 40.28MHz, 80.56MHz, 161.13MHz,
322.26MHz, or 644.53MHz
• Output frequency range selection
• 1x, 2x, 4x, 8x, 16x, and 32x outputs on QOUT
• Regenerated input clock on QREG
• Lock indicator
• Power-down mode
• LVPECL or LVDS outputs
• Two modes of output frequency range
- Mode 0: QOUT range 155.5 - 166.6MHz. QREG is a regenerated version
of the input clock.
- Mode 1: QOUT range 622 - 666.5MHz. QREG is a regenerated version
of the input clock frequency.
• Hitless switchover
• Differential LVPECL, LVDS, or single-ended LVTTL input interface
• 2.375 - 3.465V core and I/O
• Available in VFQFPN package
DESCRIPTION:
The IDT5T929 generates a high precision FEC (Forward Error Cor-
rection) or non-FEC source clock for SONET/SDH systems as well as a
source clock for Gigabit Ethernet systems. This device also has clock
regeneration capability: it creates a "clean" version of the clock input by
using the internal oscillator to square the input clock's rising and falling
edges and remove jitter. In the event that the main clock input fails, the
device automatically locks to a backup reference clock using a hitless
switchover mechanism.
This device detects loss of valid CLKIN and leaves the VCO of the PLL at
the last valid frequency while an alternate input REFIN is selected. If CLKIN
and REFIN are different frequencies, the multiplication factor will be adjusted to
retain the same output frequency.
The IDT5T929 can act as a translator from a differential LVPECL, LVDS, or
single-ended LVTTL input to LVPECL or LVDS outputs. The IDT5T929-10
has LVDS outputs and the IDT5T929-30 has LVPECL outputs.
The two modes of output frequency range are controlled by the SELmode.
When SELmode is high or low, the QOUT is a multiplied version of the input clock
while QREG is a regenerated version of the input clock.
APPLICATIONS:
• Terabit routers
• Gigabit ethernet systems
• SONET / SDH systems
• Digital cross connects
• Optical transceiver modules
FUNCTIONAL BLOCK DIAGRAM
CLKIN
CLKIN
INPUT
MUX
PLL
REFIN
REFIN
LOCK,
FREQ.
DETECTOR
LOCK
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
c 2004 Integrated Device Technology, Inc.
CONTROL
LOGIC
PD
SELMODE
1
DIVN
DIVM
QREG
QREG
QOUT
QOUT
JANUARY 2004
DSC 6400/13

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IDT5T929 equivalent
IDT5T929
PRECISION CLOCK GENERATOR OC-48 APPLICATIONS
INDUSTRIALTEMPERATURERANGE
www.DataSheet4U.com
POWER SUPPLY CHARACTERISTICS(1,2)
Symbol
Parameter
Test Conditions
IDD_PD
Power Supply Current
VDD = Max., PD = GND, All outputs unloaded
IDD Power Supply Current per Input HIGH VDD = Max., VIN = 2.375V
(LVTTL inputs only)
ITOT Total Power Supply Current
VDD = Max., QOUT = 622MHz, All outputs unloaded
Typ. Max
50
100
200
Unit
µA
µA
mA
NOTES:
1. These power consumption characteristics are for all the valid input interfaces and cover the worst case input and output interface combinations.
2. As a general requirement, these parts must be capable of operating at the maximum frequency under a nominal load at a reasonable operating temperature. That means that
these parts must not burn up under extended use in a typical application.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Symbol
VIHH
VILL
I2
Parameter
Input HIGH Voltage Level(1)
Input LOW Voltage Level(1)
2-Level Input DC Current
Test Conditions
2-Level Inputs Only
2-Level Inputs Only
VIN = VDD
HIGH Level
VIN = GND
LOW Level
Min.
VDD – 0.4
–200
Max
0.4
200
Unit
V
V
µA
NOTE:
1. These inputs are normally wired to VDD or GND. If these inputs are switched dynamically after powerup, the function and timing of the outputs may be glitched, and the PLL may
require additional tAQ time before all datasheet limits are achieved.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE FOR LVTTL
Symbol
Parameter
Test Conditions
Min. Typ.
Max
Unit
IIH Input HIGH Current
VDD = 3.465V
— — ±1 µA
IIL Input LOW Current
VDD = 3.465V
— — ±1
VIK Clamp Diode Voltage
VDD = 2.375V, IIN = -18mA
— - 0.7 - 1.2
V
VIN DC Input Voltage
- 0.3 — +3.465 V
VIH DC Input HIGH
1.7 —
V
VIL DC Input LOW
— — 0.7
V
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE FOR LVPECL(1)
Symbol
Parameter
Input Characteristics
Test Conditions
Min.
Typ.
Max. Unit
IIN Input Current (CLKIN, REFIN)
VCMR
Common Mode Input Voltage
VDIF DifferentialVoltageRequiredtoToggleInput
Output Characteristics
VDD = 3.465V
-20
1
100
+20 µA
VDD - 0.3
V
— — mV
VOH
VOL
VSWING
Output Voltage HIGH (terminated through 50tied to VDD - 2V)(2)
Output Voltage LOW (terminated through 50tied to VDD - 2V)(2)
Peak-to-Peak Output Voltage Swing
VDD - 1.15
VDD - 0.9
V
VDD - 1.95
VDD - 1.61
V
0.55 0.93 V
NOTES:
1. VDD = 2.375 - 3.645V.
2. Not to exceed VDD - 0.05V.
5


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IDT5T929The function is PRECISION CLOCK GENERATOR OC-48 APPLICATIONS. Integrated Device TechnologyIntegrated Device Technology

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