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PDF TC74VHC9541P Data sheet ( Hoja de datos )

Número de pieza TC74VHC9541P
Descripción Octal Universal Schmitt Buffer
Fabricantes Toshiba Semiconductor 
Logotipo Toshiba Semiconductor Logotipo



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TC74VHC9541P/FT/FK
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic www.DataSheet4U.com
TC74VHC9541P,TC74VHC9541FT,TC74VHC9541FK
Octal Universal Schmitt Buffer with 3-State Outputs
The TC74VHC9541 is an ultra-high-speed octal Schmitt buffer
fabricated using silicon-gate CMOS technology. The
TC74VHC9541 combines low power consumption of CMOS with
Schottky TTL speeds.
The outputs can be put in the high-impedance state by placing
a logic HIGH on the Enable ( G ) input. The CONT input
determines the logical inversion of data. A logic LOW on the
CONT input configures the TC74VHC9541 as an inverter; a logic
HIGH on the CONT input configures the TC74VHC9541 as a
buffer.
All the inputs have hysteresis between the positive-going and
negative-going thresholds. Thus the TC74VHC9541 is capable of
squaring up transitions of slowly changing input signals and
provides an improved noise immunity.
Additionally, all the inputs have a newly developed protection
circuit without a diode returned to VCC. This enables the inputs
to be tolerant of up to 5 volts even when power supply is down.
The input power-down protection capability makes the
TC74VHC9541 ideal for a wide range of applications, such as
interfacing between different voltages, voltage translation from 5
V to 3 V and battery back-up circuits.
Features
High speed: tpd = 5.0 ns (typ.) (VCC = 5 V)
Low supply current: ICC = 4 μA (max) (Ta = 25°C)
High noise immunity: VNIH = VNIL = 28% VCC (min)
All inputs are provided with power-down protection.
Symmetrical rise and fall delays: tpLH tpHL
Wide operating voltage range: VCC (opr) = 2 to 5.5 V
Pin-compatible with TC74VHC540 and TC74VHC541
TC74VHC9541P
TC74VHC9541FT
TC74VHC9541FK
Weight
DIP20-P-300-2.54A:
1.30 g (typ.)
TSSOP20-P-0044-0.65A: 0.08 g (typ.)
VSSOP20-P-0030-0.50: 0.03 g (typ.)
1 2009-02-01

1 page




TC74VHC9541P pdf
AC Characteristics (input: tr = tf = 3 ns)
Characteristics
Propagation delay
time
(An-Yn)
Propagation delay
time
(CONT-Yn)
3-state output enable
time
3-state output disable
time
Output to output skew
Input capacitance
Output capacitance
Symbol
tpLH
tpHL
tpLH
tpHL
tpZL
tpZH
tpLZ
tpHZ
tosHL
tosLH
CIN
COUT
Test Condition
VCC (V)
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
5.0 ± 0.5
RL = 1 kΩ
3.3 ± 0.3
5.0 ± 0.5
RL = 1 kΩ
3.3 ± 0.3
5.0 ± 0.5
3.3 ± 0.3
(Note 1)
5.0 ± 0.5
CL (pF)
15
50
15
50
15
50
15
50
15
50
15
50
50
50
50
50
Power dissipation
capacitance (Note 2)
CPD
fIN = 1 MHz
TC74VHC9541P/FT/FK
www.DataSheet4U.com
Ta = 25°C
Min Typ. Max
6.0 8.0
9.0 12.5
5.0 5.5
7.0 8.5
8.5 11.5
13.0 17.0
6.5 8.0
10.5 12.5
6.0 8.0
10.5 13.5
4.5 5.5
9.0 10.5
12.5 13.5
9.0 9.5
― ― 1.5
― ― 1.0
4 10
6
Ta =
40 to 85°C
Min Max
1.0 10.0
1.0 15.0
1.0 7.0
1.0 10.0
1.0 13.5
1.0 20.5
1.0 9.5
1.0 15.0
1.0 9.5
1.0 16.5
1.0 6.5
1.0 12.5
1.0 16.0
1.0 11.0
1.5
1.0
10
――
Unit
ns
ns
ns
ns
ns
pF
pF
11 ― ― ― pF
Note 1: Parameter guaranteed by design.
tosLH = |tpLHm tpLHn|, tosHL = |tpHLm tpHLn|
Note 2: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPD·VCC·fIN + ICC / 8 (per bit)
5 2009-02-01

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