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Número de pieza | TC74VHC9273FK | |
Descripción | CMOS Digital Integrated Circuit Silicon Monolithic | |
Fabricantes | Toshiba Semiconductor | |
Logotipo | ||
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No Preview Available ! TC74VHC9273P/FT/FK
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic www.DataSheet4U.com
TC74VHC9273P,TC74VHC9273FT,TC74VHC9273FK
Octal D-Type Flip Flop with Clear
The TC74VHC9273 is an advanced high speed CMOS OCTAL
D-TYPE FLIP FLOP fabricated with silicon gate C2MOS
technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
Information signals applied to D inputs are transferred to the
Q outputs on the positive going edge of the clock pulse.
When the CLR input is held “L”, the Q outputs are at a low
logic level independent of the other inputs.
The CLR input and CK input have hysteresis between the
positive-going and negative-going thresholds. Thus the
TC74VHC9273 is capable of squaring up transitions of slowly
changing input signals and provides an improved noise
immunity.
It is easy to wire on the board because Input terminals are at
the opposite side of Output terminals.
An input protection circuit ensures that 0 to 5.5 V can be
applied to the input pins without regard to the supply voltage.
This device can be used to interface 5 V to 3 V systems and two
supply systems such as battery back up. This circuit prevents
device destruction due to mismatched supply and input voltages.
Features
• High speed: fmax = 195 MHz (typ.) at VCC = 5 V
• Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
• High noise immunity: VNIH = VNIL = 28% VCC (min)
• Power down protection is provided on all inputs.
• Balanced propagation delays: tpLH ∼− tpHL
• Wide operating voltage range: VCC (opr) = 2 to 5.5 V
• Function compatible with 74VHC273
• Input terminals are at the opposite side of Output terminals
TC74VHC9273P
TC74VHC9273FT
TC74VHC9273FK
Weight
DIP20-P-300-2.54A
TSSOP20-P-0044-0.65A
VSSOP20-P-0030-0.50
: 1.30 g ( typ.)
: 0.08 g ( typ.)
: 0.03 g ( typ.)
1 2009-04-01
1 page TC74VHC9273P/FT/FK
AC Characteristics (input: tr = tf = 3 ns)
Characteristics
Symbol
Propagation delay
time
(CK-Q)
tpLH
tpHL
Propagation delay
time
( CLR -Q)
tpHL
Maximum clock
frequency
fmax
Output to output skew
Input capacitance
Power dissipation
capacitance
tosLH
tosHL
CIN
CPD
Test Condition
VCC (V)
3.3 ± 0.3
―
5.0 ± 0.5
3.3 ± 0.3
―
5.0 ± 0.5
3.3 ± 0.3
―
5.0 ± 0.5
3.3 ± 0.3
(Note 1)
5.0 ± 0.5
―
CL (pF)
15
50
15
50
15
50
15
50
15
50
15
50
50
50
(Note 2)
www.DataSheet4U.com
Ta = 25°C
Min Typ. Max
― 5.7 11.8
― 8.7 18.4
― 4.2 7.7
― 6.5 12.1
― 5.9 12.3
― 8.6 18.0
― 4.3 8.0
― 6.5 11.9
85 140 ―
50 75 ―
130 195
―
80 100 ―
― ― 1.5
― ― 1.0
― 4 10
― 11 ―
Ta = −40 to
85°C
Min Max
1.0 13.4
1.0 20.9
1.0 8.8
1.0 13.8
1.0 14.0
1.0 20.6
1.0 9.1
1.0 13.6
75 ―
45 ―
115 ―
70 ―
― 1.5
― 1.0
― 10
――
Unit
ns
ns
MHz
ns
pF
pF
Note 1: Parameter guaranteed by design.
tosLH = |tpLHm − tpLHn|, tosHL = |tpHLm − tpHLn|
Note 2: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPD·VCC·fIN + ICC/8 (per bit)
And the total CPD when n pcs.of flip flop operate can be calculated by the following equation:
CPD (total) = 7 + 4·n
Input Equivalent Circuit
INPUT
5 2009-04-01
5 Page |
Páginas | Total 9 Páginas | |
PDF Descargar | [ Datasheet TC74VHC9273FK.PDF ] |
Número de pieza | Descripción | Fabricantes |
TC74VHC9273FK | CMOS Digital Integrated Circuit Silicon Monolithic | Toshiba Semiconductor |
TC74VHC9273FT | CMOS Digital Integrated Circuit Silicon Monolithic | Toshiba Semiconductor |
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