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PDF TEA1751T Data sheet ( Hoja de datos )
| Número de pieza | TEA1751T | |
| Descripción | HV start-up DCM/QR flyback controller | |
| Fabricantes | NXP Semiconductors | |
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TEA1751T
HV start-up DCM/QR flyback controller with integrated
DCM/QR PFC controller
Rev. 3 — 10 January 2013
Product data sheet
1. General description
The TEA1751T is the third generation of green Switched Mode Power Supply (SMPS)
controller ICs. The TEA1751T combines a controller for Power Factor Correction (PFC)
and a flyback controller. Its high level of integration allows the design of a cost-effective
power supply with a very low number of external components.
The special built-in green functions provide high efficiency at all power levels. This
efficiency applies to quasi-resonant operation at high-power levels, quasi-resonant
operation with valley skipping, as well as reduced frequency operation at lower power
levels. At low-power levels, the PFC switches off to maintain high efficiency.
During low-power conditions, the flyback controller switches to frequency reduction mode
and limits the peak current to 25 % of its maximum value. This mode ensures high
efficiency at low-power and good standby power performance while minimizing audible
noise from the transformer.
The TEA1751T is a Multi-Chip Module, (MCM), containing two chips. The proprietary
high-voltage BCD800 process which makes direct start-up possible from the rectified
universal mains voltage in an effective and green way. The second low voltage
Silicon On Insulator (SOI) is used for accurate, high speed protection functions and
control.
The TEA1751T enables the design of highly efficient and reliable supplies with power
requirements of up to 250 W using the minimum number of external components.
Remark: All values provided throughout this data sheet are typical values unless
otherwise stated.
1 page  
NXP Semiconductors
6. Pinning information
6.1 Pinning
TEA1751T
HV start-up flyback controller with integrated PFC controller
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Fig 2. Pin configuration: TEA1751T (SOT109-1)
6.2 Pin description
Table 2. Pin description
Symbol
Pin
VCC
GND
1
2
FBCTRL
3
FBAUX
4
LATCH
5
PFCCOMP
6
VINSENSE
7
PFCAUX
8
VOSENSE
9
FBSENSE
10
PFCSENSE
11
PFCDRIVER 12
FBDRIVER
13
HVS
14 and15
HV 16
Description
supply voltage
ground
flyback control input
auxiliary winding input for demagnetization timing and flyback OVP
general-purpose protection input
frequency compensation pin for PFC
mains voltage sense input
auxiliary winding input for demagnetization timing for PFC
sense input for PFC output voltage
flyback current sense input
PFC current sense input
PFC gate-driver output
flyback gate-driver output
high-voltage safety spacer, not connected
high-voltage start-up / flyback valley sensing
TEA1751T
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 10 January 2013
© NXP B.V. 2013. All rights reserved.
5 of 31
5 Page 
NXP Semiconductors
TEA1751T
HV start-up flyback controller with integrated PFC controller
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Fig 5. Soft-start-up of PFC
DDD
7.2.6 Low-power mode
When the output power of the flyback converter (see Section 7.3) is low, the flyback
converter switches over to frequency reduction mode. The power factor correction circuit
is then switched off to maintain high efficiency.
During low-power mode operation, the PFCCOMP pin is clamped to a minimum voltage of
2.7 V and a maximum voltage of 3.9 V. The lower clamp voltage limits the maximum
power that is delivered when the PFC is switched on again. The upper clamp voltage
ensures that the PFC returns to its normal regulation point in a limited time when returning
from low-power mode.
When the flyback converter leaves the frequency reduction mode, the power factor
correction circuit restores normal operation. To prevent continuous switching of the PFC
circuit, a small hysteresis is built in (75 mV on the FBCTRL pin).
7.2.7 Dual-boost PFC
The mains input voltage modulates the PFC output voltage. The mains input voltage is
measured using the VINSENSE pin. If the voltage on the VINSENSE pin drops below
2.2 V, the current is sourced from the VOSENSE pin. To ensure the stable switch-over, a
200 mV transition region is inserted around the 2.2 V, see Figure 6.
At low VINSENSE input voltages, the output current is 15 A. This output current, in
combination with the resistors on the VOSENSE pin, sets the lower PFC output voltage
level at low mains voltages. At high mains input voltages, the current is switched to zero.
The PFC output voltage is then at its maximum. As this current is zero in this situation, it
does not affect the accuracy of the PFC output voltage.
To ensure proper switch-off, the VOSENSE current switches to its maximum value of
15 A when the voltage on pin VOSENSE drops below 2.1 V.
TEA1751T
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 3 — 10 January 2013
© NXP B.V. 2013. All rights reserved.
11 of 31
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| PDF Descargar | [ Datasheet TEA1751T.PDF ] | |
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