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PDF MAX11049 Data sheet ( Hoja de datos )
| Número de pieza | MAX11049 | |
| Descripción | 4-/6-/8-Channel 16-Bit Simultaneous-Sampling ADCs | |
| Fabricantes | Maxim Integrated Products | |
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19-5106; Rev 0; 12/09
EVAALVUAAILTAIOBNLEKIT
www.DataSheet4U.com
4-/6-/8-Channel, 16-Bit,
Simultaneous-Sampling ADCs
General Description
The MAX11047/MAX11048/MAX11049 16-bit ADCs
offer 4, 6, or 8 independent input channels. Featuring
independent track and hold (T/H) and SAR circuitry,
these parts provide simultaneous sampling at 250ksps
for each channel.
The MAX11047/MAX11048/MAX11049 accept a 0 to
+5V input. All inputs are overrange protected with inter-
nal ±20mA input clamps providing overrange protec-
tion with a simple external resistor. Other features
include a 4MHz T/H input bandwidth, internal clock,
and internal or external reference. A 20MHz, 16-bit,
bidirectional, parallel interface provides the conversion
results and accepts digital configuration inputs.
The MAX11047/MAX11048/MAX11049 operate with a
4.75V to 5.25V analog supply and a separate flexible 2.7V
to 5.25V digital supply for interfacing with the host without a
level shifter. The MAX11047/MAX11048/MAX11049
are available in a 56-pin TQFN package and operate over
the extended -40°C to +85°C temperature range.
Applications
Automatic Test Equipment
Power-Factor Monitoring and Correction
Power-Grid Protection
Multiphase Motor Control
Vibration and Waveform Analysis
Functional Diagram
AVDD
CH0
CLAMP S/H 16-BIT ADC
CH7
CLAMP S/H 16-BIT ADC
AGNDS
AGND
MAX11047
MAX11048
MAX11049
REFIO
BANDGAP
REFERENCE
INT REF
EXT REF
REF
BUF
DVDD
DB15
DB4
DB3
DB0
CONFIGURATION
REGISTERS
INTERFACE
AND
CONTROL
WR
RD
CS
CONVST
SHDN
EOC
RDC
DGND
Features
o 4-/6-/8-Channel 16-Bit ADC
o Single Analog and Digital Supply
o High-Impedance Inputs Up to 1GΩ
o On-Chip T/H Circuit for Each Channel
o Fast 3µs Conversion Time
o High Throughput: 250ksps for All 8 Channels
o 16-Bit, High-Speed, Parallel Interface
o Internal Clocked Conversions
o 10ns Aperture Delay
o 100ps Channel-to-Channel T/H Matching
o Low Drift, Accurate 4.096V Internal Reference
Providing an Input Range of 0 to 5V
o External Reference Range of 3.0V to 4.25V,
Allowing Full-Scale Input Ranges of +3.7V to
+5.2V
o 56-Pin TQFN Package (8mm x 8mm)
o Evaluation Kit Available
Ordering Information
PART
PIN-PACKAGE
CHANNELS
MAX11047ETN+
56 TQFN-EP*
4
MAX11048ETN+
56 TQFN-EP*
6
MAX11049ETN+
56 TQFN-EP*
8
Note: All devices are specified over the -40°C to +85°C operating
temperature range.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Pin Configuration
TOP VIEW
42 41 40 39 38 37 36 35 34 33 32 31 30 29
RDC 43
AGNDS 44
CH7 45
AGND 46
AVDD 47
AGNDS 48
RDC 49
DGND 50
DVDD 51
WR 52
CS 53
MAX11047
MAX11048
MAX11049
28 RDC
27 AGNDS
26 CH0
25 AGND
24 AVDD
23 AGNDS
22 RDC
21 DGND
20 DVDD
19 SHDN
18 CONVST
RD 54
DB15 55
DB14 56
+
17 EOC
*EP 16 DB0
15 DB1
1 2 3 4 5 6 7 8 9 10 11 12 13 14
TQFN
____________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1 page  
www.DataSheet4U.com
4-/6-/8-Channel, 16-Bit,
Simultaneous-Sampling ADCs
ELECTRICAL CHARACTERISTICS (continued)
(AVDD = 4.75V to 5.25V, DVDD = +2.7V to 5.25V, VAGNDS = VAGND = VDGND = 0V, VREFIO = internal reference, CRDC = 4 x 33μF,
CREFIO = 0.1μF, CAVDD = 4 x 0.1μF || 10μF, CDVDD = 3 x 0.1μF || 10μF; all digital inputs at DVDD or DGND, unless otherwise noted.
TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.)
Note 1: See the Definitions section at the end of the data sheet.
Note 2: Guaranteed at 5V ≤ VAVDD ≤ 5.25V for+25°C ≤ TA ≤ +85°C. See the Input Range and Protection section and Typical
Operating Characteristics.
Note 3: TA = -40°C.
Note 4: Dynamic performance is guaranteed at AVDD = 5.0V to 5.25V. See the Input Range and Protection section and the Typical
Operating Characteristics.
Note 5: Tested with alternating channels modulated at full scale and ground.
Note 6: See the Input Range and Protection section.
Note 7: CLOAD= 30pF on DB0–DB15 and EOC. Inputs (CH0–CH7) alternate between full scale and zero scale. fCONV = 250ksps. All
data is read out.
Note 8: Defined as the change in positive full scale caused by a ±2% variation in the nominal supply voltage.
Note 9: It is recommended that RD, WR, and CS are kept high for the quiet time (tQ) and conversion time (tCON).
Note 10: Guaranteed by design.
Typical Operating Characteristics
(AVDD = 5V, DVDD = 3.3V, TA = +25°C, fSAMPLE = 250ksps, internal reference, unless otherwise noted.)
1.0
0.8
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1.0
0
INTEGRAL NONLINEARITY (INL)
vs. CODE
VAVDD = 5.0V
VDVDD = 3.3V
fSAMPLE = 250ksps
TA = +25°C
VRDC = 4.096V
OUTPUT CODE (DECIMAL)
DIFFERENTIAL NONLINEARITY (DNL)
vs. CODE
1.0
0.8
VAVDD = 5.0V, VDVDD = 3.3V, fSAMPLE = 250ksps
TA = +25°C, VRDC = 4.096V
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1.0
OUTPUT CODE (DECIMAL)
INL AND DNL
vs. ANALOG SUPPLY VOLTAGE
1.5
MAX INL
1.0
0.5
0
-0.5
-1.0
-1.5
4.75
MAX DNL
MIN DNL
MIN INL
VDVDD = 3.3V
fSAMPLE = 250ksps
TA = +25°C
VRDC = 4.096V
4.85 4.95 5.05 5.15 5.25
VAVDD (V)
INL AND DNL vs. TEMPERATURE
1.5
MAX INL
1.0
0.5 VAVDD = 5.0V
MAX DNL
VDVDD = 3.3V
0 fSAMPLE = 250ksps
VRDC = 4.096V
-0.5
ANALOG SUPPLY CURRENT
vs. SUPPLY VOLTAGE
37
TA = +25°C
35 fSAMPLE = 250ksps
MAX11049
MAX11049
33
STATIC
CONVERTING
31
MAX11048
MAX11048
29
STATIC
CONVERTING
MAX11047 CONVERTING
-1.0 MIN INL
MIN DNL
27
MAX11047 STATIC
-1.5
-40
-15 10 35 60
TEMPERATURE (°C)
85
25
4.75 4.85 4.95 5.05 5.15 5.25
VAVDD (V)
_______________________________________________________________________________________ 5
5 Page 
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4-/6-/8-Channel, 16-Bit,
Simultaneous-Sampling ADCs
RS
=
VFAULT _ MAX
20mA
− 7V
where VFAULT_MAX is the maximum voltage that the
source produces during a fault condition.
Figures 2 and 3 illustrate the clamp circuit voltage-cur-
rent characteristics for a source impedance RS =
1280Ω. While the input voltage is within the range of
-300mV to +(VAVDD + 300mV), no current flows in the
input clamps. Once the input voltage goes beyond this
voltage range, the clamps turn on and limit the voltage
at the input pin.
INPUT
PIN
SIGNAL VOLTAGE
AVDD
RS
CH0
CLAMP
S/H
SOURCE
CH7
CLAMP
S/H
Applications Information
Digital Interface
The bidirectional, parallel, digital interface, DB0–DB3,
sets the 4-bit configuration register. This interface
configures the following control signals: chip select
(CS), read (RD), write (WR), end of conversion (EOC),
and convert start (CONVST). Figures 6 and 7 and the
Timing Characteristics in the Electrical Characteristics
table show the operation of the interface. DB0–DB3,
together with the output-only DB4–DB15, also output
the 16-bit conversion result. All bits are high imped-
ance when RD = 1 or CS = 1.
16-BIT ADC
16-BIT ADC
DVDD
DB15
DB4
DB3
DB0
AGNDs
AGND
MAX11047
MAX11048
MAX11049
REFIO
BANDGAP
REFERENCE
INT REF
EXT REF
REF
BUF
CONFIGURATION
REGISTERS
INTERFACE
AND
CONTROL
WR
RD
CS
CONVST
SHDN
EOC
RDC
DGND
Figure 1. Required Setup for Clamp Circuit
25
20
RS = 1170I
VAVDD = 5.0V
15
10 AT CH_ INPUT
5
0 AT SOURCE
-5
-10
-15
-20
-25
-30 -20 -10 0 10 20 30 40
SIGNAL VOLTAGE AT SOURCE AND CH_ INPUT (V)
25
20
RS = 1170I
VAVDD = 5.0V
15
10 AT CH_ INPUT
5 AT SOURCE
0
-5
-10
-15
-20
-25
-4 -2 0 2 4 6 8
SIGNAL VOLTAGE AT SOURCE AND CH_ INPUT (V)
Figure 2. Input Clamp Characteristics
Figure 3. Input Clamp Characteristics (Zoom In)
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 18 Páginas | |
| PDF Descargar | [ Datasheet MAX11049.PDF ] | |
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