|
|
PDF AD9716 Data sheet ( Hoja de datos )
| Número de pieza | AD9716 | |
| Descripción | TxDAC Digital-to-Analog Converters | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de AD9716 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
Dual, Low Power, 8-/10-/12-/14-Bit
TxDAC Digital-to-Analog Converters
AD9714/AD9715/AD9716/AD9717
FEATURES
Power dissipation @ 3.3 V, 2 mA output
37 mW @ 10 MSPS
86 mW @ 125 MSPS
Sleep mode: <3 mW @ 3.3 V
Supply voltage: 1.8 V to 3.3 V
SFDR to Nyquist
84 dBc @ 1 MHz output
75 dBc @ 10 MHz output
AD9717 NSD @ 1 MHz output, 125 MSPS, 2 mA: −151 dBc/Hz
Differential current outputs: 1 mA to 4 mA
2 on-chip auxiliary DACs
CMOS inputs with single-port operation
Output common mode: adjustable 0 V to 1.2 V
Small footprint 40-lead LFCSP RoHS-compliant package
APPLICATIONS
Wireless infrastructures
Picocell, femtocell base stations
Medical instrumentation
Ultrasound transducer excitation
Portable instrumentation
Signal generators, arbitrary waveform generators
GENERAL DESCRIPTION
The AD9714/AD9715/AD9716/AD9717 are pin-compatible,
dual, 8-/10-/12-/14-bit, low power digital-to-analog converters
(DACs) that provide a sample rate of 125 MSPS. These TxDAC®
converters are optimized for the transmit signal path of commu-
nication systems. All the devices share the same interface, package,
and pinout, providing an upward or downward component
selection path based on performance, resolution, and cost.
The AD9714/AD9715/AD9716/AD9717 offer exceptional ac and
dc performance and support update rates up to 125 MSPS.
The flexible power supply operating range of 1.8 V to 3.3 V and
low power dissipation of the AD9714/AD9715/AD9716/AD9717
make them well-suited for portable and low power applications.
PRODUCT HIGHLIGHTS
1. Low Power.
DACs operate on a single 1.8 V to 3.3 V supply; total power
consumption reduces to 35 mW at 125 MSPS with a 1.8 V
supply. Sleep and power-down modes are provided for low
power idle periods.
2. CMOS Clock Input.
High speed, single-ended CMOS clock input supports a
125 MSPS conversion rate.
3. Easy Interfacing to Other Components.
Adjustable output common mode from 0 V to 1.2 V allows
easy interfacing to other components that accept common-
mode levels greater than 0 V.
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2008–2009 Analog Devices, Inc. All rights reserved.
1 page  
AD9714/AD9715/AD9716/AD9717
SPECIFICATIONS
DC SPECIFICATIONS
TMIN to TMAX, AVDD = 3.3 V, DVDD = 1.8 V, DVDDIO = 3.3 V, CVDD = 3.3 V, IxOUTFS = 2 mA, maximum sample rate, unless
otherwise noted.
Table 1.
Parameter
RESOLUTION
ACCURACY, AVDD = DVDDIO =
CVDD = 3.3 V
Differential Nonlinearity (DNL)
Precalibration
Postcalibration
Integral Nonlinearity (INL)
Precalibration
Postcalibration
ACCURACY, AVDD = DVDDIO =
CVDD = 1.8 V
Differential Nonlinearity (DNL)
Precalibration
Postcalibration
Integral Nonlinearity (INL)
Precalibration
Postcalibration
MAIN DAC OUTPUTS
Offset Error
Gain Error
Internal Reference
Full-Scale Output Current1
AVDD = 3.3 V
AVDD = 1.8 V
Output Compliance Range
Output Resistance
Crosstalk, Q DAC to I DAC
fOUT = 30 MHz
fOUT = 60 MHz
MAIN DAC TEMPERATURE DRIFT
Offset
Gain
Reference Voltage
AUXDAC OUTPUTS
Resolution
Full-Scale Output Current
(Current Sourcing Mode)
Voltage Output Mode
Output Compliance Range
(Sourcing 1 mA)
Output Compliance Range
(Sinking 1 mA)
Output Resistance in Current
Output Mode, AVSS to 1 V
AUX DAC Monotonicity
Guaranteed
REFERENCE OUTPUT
Internal Reference Voltage
Output Resistance
Min
−1
−2
1
1
−0.5
VSS
VSS
VSS +
0.25
0.98
AD9714
Typ Max
8
±0.02
±0.003
±0.025
±0.01
±0.02
±0.005
±0.025
±0.02
0 +1
+2
24
2 2.5
0 +1.2
200
97
78
0
±40
±25
10
125
VDD
VDD −
0.25
VDD
1
10
1.025
10
1.08
Min
−1
−2
1
1
−0.5
VSS
VSS
VSS +
0.25
0.98
AD9715
Typ Max
10
±0.08
±0.01
±0.13
±0.05
±0.08
±0.01
±0.12
±0.05
0 +1
+2
24
2 2.5
0 +1.2
200
97
78
0
±40
±25
10
125
VDD
VDD −
0.25
VDD
1
10
1.025
10
1.08
Min
−1
−2
1
1
−0.5
VSS
VSS
VSS +
0.25
0.98
AD9716
Typ Max
12
±0.4
±0.2
±0.4
±0.3
±0.4
±0.2
±0.4
±0.25
0 +1
+2
24
2 2.5
0 +1.2
200
97
78
0
±40
±25
10
125
VDD
VDD −
0.25
VDD
1
10
1.025 1.08
10
AD9717
Min Typ Max
14
±1.7
±1.0
±1.8
±1.3
±1.2
±1.0
±1.5
±1.1
−1 0
+1
−2 +2
12
12
−0.5 0
200
4
2.5
+1.2
97
78
0
±40
±25
VSS
VSS
VSS +
0.25
10
125
1
10
VDD
VDD −
0.25
VDD
0.98 1.025 1.08
10
Unit
Bits
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
mV
% of FSR
mA
mA
V
MΩ
dB
dB
ppm/°C
ppm/°C
ppm/°C
Bits
μA
V
V
V
MΩ
Bits
V
kΩ
Rev. A | Page 5 of 80
5 Page 
AD9714/AD9715/AD9716/AD9717
Pin No.
31
32
33
34
35
36
37
38
39
40
41 (EPAD)
Mnemonic
CMLI
FSADJQ/AUXQ
FSADJI/AUXI
REFIO
RESET/PINMD
SCLK/CLKMD
SDIO/FORMAT
CS/PWRDN
DB7 (MSB)
DB6
Exposed Pad
(EPAD)
Description
I DAC Output Common-Mode Level. When the internal on chip (IRCML) is enabled, this pin is connected to the
on-chip IRCML resistor. It is recommended to leave this pin unconnected. When the internal on chip (IRCML) is
disabled, this pin is the common-mode load for I DAC and must be connected to AVSS through a resistor
(see the Using the Internal Termination Resistors section). The recommended value for this external resistor
is 0 Ω.
Full-Scale Current Output Adjust (FSADJQ). When the internal on chip (QRSET) is disabled, this pin is the full-
scale current output adjust for Q DAC and must be connected to AVSS through a resistor (see the Theory of
Operation section). The nominal value for this external resistor is 16 kΩ for a 2 mA output current.
Auxiliary Q DAC Output (AUXQ). When the internal on chip (QRSET) is enabled, this pin is the auxiliary Q DAC
output.
Full-Scale Current Output Adjust (FSADJI). When the internal on chip (IRSET) is disabled, this pin is full-scale
current output adjust for I DAC and must be connected to AVSS through a resistor (see the Theory of
Operation section). The nominal value for this external resistor is 16 kΩ for a 2 mA output current.
Auxiliary I DAC Output (AUXI). When the internal on chip (IRSET) is enabled, this pin is the auxiliary I DAC
output.
Reference Input/Output. Serves as a reference input when the internal reference is disabled. Provides a 1.0 V
reference output when in internal reference mode (a 0.1 μF capacitor to AVSS is required).
This pin defines the operation mode of the part. A logic low (pull-down to DVSS) sets the part in SPI mode.
Pulse RESET high to reset the SPI registers to their default values.
A logic high (pull-up to DVDDIO) puts the device into pin mode (PINMD).
Clock Input for Serial Port (SCLK). In SPI mode, this pin is the clock input for the serial port.
Clock Mode (CLKMD). In pin mode, CLKMD determines the phase of the internal retiming clock. When
DCLKIO = CLKIN, tie it to 0. When DCLKIO ≠ CLKIN, pulse 0 to 1 to edge trigger the internal retimer (see the
Retimer section).
Serial Port Input/Output (SDIO). In SPI mode, this pin is the bidirectional data line for serial port.
Format Pin (FORMAT). In pin mode, FORMAT determines the data format of digital data. A logic low (pull-
down to DVSS) selects the binary input data format. A logic high (pull-up to DVDDIO) selects the two
complement input data format.
Active Low Chip Select (CS). In SPI mode, this pin serves as the active low chip select. In pin mode, a logic
high (pull-up to DVDDIO) powers down the device, except for the SPI port.
Power-Down (PWRDN). In pin mode, PWRDN powers down the device except for the SPI port.
Digital Input (MSB).
Digital Input.
The exposed pad is connected to AVSS and should be soldered to the ground plane. Exposed metal at the
package corners is connected to this pad.
Rev. A | Page 11 of 80
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AD9716.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| AD9712 | 100MSPS D/A CONVERTERS | Analog Devices |
| AD9712B | 12-Bit/ 100 MSPS D/A Converters | Analog Devices |
| AD9713 | 100MSPS D/A CONVERTERS | Analog Devices |
| AD9713B | 12-Bit/ 100 MSPS D/A Converters | Analog Devices |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |