PDF ICS162835 Data sheet ( Hoja de datos )

Número de pieza	ICS162835
Descripción	18-Bit 3.3V Registered Buffer
Fabricantes	Integrated Circuit Systems
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Hay una vista previa y un enlace de descarga de ICS162835 (archivo pdf) en la parte inferior de esta página. Total 7 Páginas
No Preview Available ! Integrated Circuit Systems, Inc. ICS162835 AdvancewwIwn.DfaotarSmheeat4Ut.icoomn 18-Bit 3.3V Registered Buffer Recommended Applications: • PC133 Registered Memory Module • PC motherboards • Servers and workstations • Provides complete PC133 DIMM solution with ICS2509, ICS2510 PLL. Product Features: • Meets JESD 82-2 specification • Internal series resistors to reduce switching noise • ±12 mA device capability • Low voltage operation - VDD = 3.3 ± 0.3V • 0.50 mm pitch, 56-Pin TSSOP package Function Table1 OE# H L L L L L L Notes: Inputs LE CLK XX HX HX L↑ L↑ LH LL Outputs Ax Yx XZ LL HH LL HH X Y0(2) X Y0(3) 1. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High-Impedance ↑ = LOW-to-HIGH Transition 2. Output level before the indicated steady-state input conditions were established, provided that CLK is HIGH before LE went LOW. 3. Output level before the indicated steady-state input conditions were established. Block Diagram OE# CLK LE A1 1D Y1 C1 CK Pin Configurations NC NC Y1 GND Y2 Y3 VDD Y4 Y5 Y6 GND Y7 Y8 Y9 Y10 Y11 Y12 GND Y13 Y14 Y15 VDD Y16 Y17 GND Y18 OE# LE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 GND 55 NC 54 A1 53 GND 52 A2 51 A3 50 VDD 49 A4 48 A5 47 A6 46 GND 45 A7 44 A8 43 A9 42 A10 41 A11 40 A12 39 GND 38 A13 37 A14 36 A15 35 VDD 34 A16 33 A17 32 GND 31 A18 30 CLK 29 GND 56-Pin TSSOP 6.10 mm. Body, 0.50 mm. pitch Pin Description Pin Names Description OE# Output Enable Input (Active Low) CLK Clock Input LE Latch Enable Input Ax Data Input Yx Data Outputs VDD GND Supply Voltage Ground 0713—09/23/02 To 17 Other Channels ADVANCE INFORMATION documents contain information on products in the formative or design phase development. Characteristic data and other specifications are design goals. ICS reserves the right to change or discontinue these products without notice. Third party brands and names are the property of their respective owners. 1 page ICS162835www.DataSheet4U.com Advance Information Test Circuit and Switching Waveforms Puls e Generator DUT RT 2 x VDD Open GND RL CL RL Test Circuit Test circuit component values: RL = Load Resistor = 500 Ω CL = Load Capacitance and includes probe and jig capacitance RT = Termination resistance should be equal to ZOUT of Pulse Generator VIN = 0 to VDD t r = tf 2.0 ns (10% to 90%) unless otherwise specified. Parameter Tested Switch Position tPLH Open tPHL Open t GND PZH tPZL 2 x VDD tPHZ GND tPLZ 2 x VDD 0713—09/23/02 5 5 Page

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