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PDF ADP3210 Data sheet ( Hoja de datos )
| Número de pieza | ADP3210 | |
| Descripción | 7-Bit Programmable Multiphase Mobile CPU Synchronous | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de ADP3210 (archivo pdf) en la parte inferior de esta página. Total 38 Páginas | ||
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FEATURES
1-, 2-, or 3-phase operation at up to 1 MHz per phase
Input Voltage Range of 3.3 V to 22 V
±8 mV worst-case differential sensing error over
temperature
Interleaved PWM outputs for driving external high power
MOSFET drivers
Automatic power-saving modes maximize efficiency during
light load and deeper sleep operation
Active current balancing between output phases
Independent current limit and load line setting inputs for
additional design flexibility
7-bit digitally programmable 0 V to 1.5 V output
Overload and short-circuit protection with latch-off delay
Built-in clock enable output for delaying CPU clock
synchronization until CPU supply voltage stabilizes
Output Current Monitor
APPLICATIONS
Notebook power supplies for next generation Intel®
processors
GENERAL DESCRIPTION
The ADP3210 is a high efficiency, multiphase, synchronous,
www.DabtuacSkh-esweti4tUch.cinomg regulator controller optimized for converting
notebook battery voltage into the core supply voltage of high
performance Intel processors. The part uses an internal 7-bit
DAC to read voltage identification (VID) code directly from the
processor that sets the output voltage. The phase relationship of
the output signals can be configured for 1-, 2-, or 3-phase
operation, with interleaved switching.
The ADP3210 uses a multimode architecture1 to drive the logic-
level PWM outputs at a switching frequency selected by the
user depending on the output current requirement. The part
switches between multiphase and single-phase operation according
to a system signal provided by the CPU. Shedding phases as
function of the load maximizes power conversion efficiency under
different load conditions. In addition, the ADP3210 supports
programmable loadline resistance adjustment. As a result, the
7-Bit Programmable
Multiphase Mobile
CPU Synchronous
ADP3210
output voltage is always optimally positioned for a load transient.
Patent 6,683,441.
FUNCTIONAL BLOCK DIAGRAM
GND
VCC EN
RPM RT RAMP
TRDET
COMP
FB
LLINE
PSI
TRDET
Generator
UVLO
Shutdown
and Bias
REF
VEA
-
+
Σ+
+ CSREF
+Σ _
OVP
1.55V
Oscillator
Current
Balancing
Circuit
Driver
Logic
DPRSLP
DAC + 200mV
-
CSREF
+
PSI and
DPRSLP
Logic
-
+
DAC - 300mV
PWRGD
PWRGD
Open
Drain
PWRGD
Start Up
Delay
CLKEN
FBRTN
CLKEN
Open
Drain
Precision
Reference
CLKEN
Start Up
Delay
Current
Limit
Circuit
Soft
Transient
Delay
Delay
Disable
VID
DAC
DAC
OCP
Shutdown
Delay
Current
Monitor
+
-
Thermal
Throttle
Control
Soft Start
and Soft
Transient
Control
REF
PWM1
PWM2
PWM3
DCM1
OD
SW1
SW2
SW3
IMON
CSREF
CSSUM
CSCOMP
ILIM
TTSENSE
VRTT
Figure 1.
The chip also provides accurate and reliable short-circuit
protection with adjustable current limit threshold and a delayed
power-good output that is masked during on-the-fly output
voltage changes to eliminate false alarm.
The ADP3210 performance is specified over the extended
commercial temperature range of -10°C to 100°C. The chip is
available in a 40-lead QFN package.
www.onsemi.com
1 page  
Parameter
PWM Clock Frequency
Symbol
fCLK
RAMP GENERATOR
RAMP Voltage
RAMP Current Range2
PWM COMPARATOR
PWM Comparator Offset2
RPM COMPARATOR
RPM Current
RPM Comparator Offset2
CLOCK SYNC
Trigger Threshold2
VRAMP
IRAMP
VOSRPM
IRPM
VOSRPM
TRDET#
Trigger Threshold2
TRDET# Low Voltage2
TRDET# Leakage Current2
SWITCH AMPLIFIER
SW Common Mode Range2
www.DataSSWheInetp4uUt.cRoemsistance
ZERO CURRENT SWITCHING
COMPARATOR
SW ZCS Threshold
Masked Off-Time
SYSTEM I/O BUFFERS
VID[6:0], DPRSLP, PSI# INPUTS
Input Voltage
VLTRDET
IHTRDET
VSW(X)CM
RSW(X)
VDCM(SW1)
tOFFMSKD
Input Current
VID Delay Time2
EN INPUT
Input Voltage
Input Current
Conditions
TA = +25°C, VVID = 1.2000 V
RT = 73 kΩ2
RT = 125 kΩ2
RT = 180 kΩ
EN = H, IRAMP = 60 μA
EN = L
EN = H
EN = L, RAMP = 19 V
VOSPWM = VRAMP − VCOMP
VVID = 1.2 V, RT = 180 kΩ
See also IRPM(RT) formula
VOSRPM = VCOMP − (1 +VRPMTH)
Relative to COMP sampled TCLK earlier
3-ph configuration
2-phase configuration
1-phase configuration
Relative to COMP sampled TCLK earlier
3-ph configuration
2-phase configuration
1-phase configuration
Logic low, ICLKENsink = 4mA
Logic high, VTRDET# = VCC
SWX = 0 V
In DCM mode, DPRSLP = 3.3 V
Measured from PWM neg edge to pos edge
Refers to input (driving) signal level
Logic low, ISINK ≥ 1 μA
Logic high, ISOURCE ≤ −5 μA
V = 0.2 V
VID[6:0], DPRSLP (active pull down to GND)
PSI# (active pull-up to VCC)
VID any edge to FB change 10%
Refers to input (driving) signal level
Logic low, ISINK ≥ 1 μA
Logic high, ISOURCE ≤ −5 μA
EN = L or EN = H (static)
0.8 V < EN < 1.6 V (during transition)
Rev. 0.3 | Page 5 of 38
ADP3210
Min Typ Max Units
1000
700
500
1300
800
600
1600
900
780
kHz
kHz
kHz
0.9 1 1.1 V
VIN V
1 100 μA
−0.5 +0.5 μA
−3 +3 mV
−6.1 μA
−3 +3 mV
350 mV
400 mV
450 mV
−450
−500
−600
30
mV
mV
mV
300 mV
3 μA
−600
+200 mV
20 35 50 kΩ
−6 mV
650 ns
0.7
−1
+2
200
V
0.3 V
μA
μA
ns
0.3 V
1.8 V
10 nA
70 μA
5 Page 
ADP3210
TYPICAL PERFORMANCE CHARACTERISTICS
1000
VID = 1.4125V
Output Voltage
VID = 1.2125V
1
Enable
VID = 1.1V
VID = 0.8125
VID = 0.6125
2 Phase Configuration
100
10 100
Rt RESISTANCE (kΩ)
Figure 6. Master Clock Frequency vs. RT
1000
2
CLKEN
3
4 PWRGD
1: 500mV/div 3: 5V/div 2ms/div
2: 5V/div
4: 5V/div
Figure 9. Start-UP Waveforms
400
350
300
250
200
150
0
0.2
0.4 0.6
0.8
VID (V)
1.0
www.DataSheet4U.com Figure 7. Master Clock vs. VID
1.2
1.4
Output Voltage
3 Phase 1
Switch Node
1
Phase 2
Switch Node
2
1: 10V/div 3: 50mV/div 1µs/div
2: 10V/div Input = 12V, Output = 1V
15A to 50A Load Step
Figure 10. Load Transient with 2 Phases
1.26
1.22
1.18
1.14
1.1
1.06
1.02
0
+2%
-2%
10 20 30 40 50 60 70
LOAD CURRENT (A)
Figure 8. Load Line Accuracy
Output Voltage
3 Phase 1
Switch Node
1
Phase 2
Switch Node
2
1: 10V/div 3: 50mV/div 1µs/div
2: 10V/div Input = 12V, Output = 1V
50A to 15A Load Step
Figure 11. Load Transient with 2 Phases
Rev. 0.3 | Page 11 of 38
11 Page | ||
| Páginas | Total 38 Páginas | |
| PDF Descargar | [ Datasheet ADP3210.PDF ] | |
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