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PDF MAX16067 Data sheet ( Hoja de datos )
| Número de pieza | MAX16067 | |
| Descripción | Flash-Configurable System Manager | |
| Fabricantes | Maxim Integrated Products | |
| Logotipo |  |
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19-5028; Rev 0; 10/09
6-Channel, Flash-Configurable System Manager
with Nonvolatile Fault Registers
General Description
The MAX16067 flash-configurable system manager
monitors and sequences multiple system voltages. The
MAX16067 manages up to six system voltages simulta-
neously. The MAX16067 integrates an analog-to-digital
converter (ADC) and configurable outputs for sequenc-
ing power supplies. Device configuration information,
including overvoltage and undervoltage limits, time
delay settings, and the sequencing order is stored in
nonvolatile flash memory. During a fault condition, fault
flags and channel voltages can be automatically stored
in the nonvolatile flash memory for later readback.
The internal 1% accurate, 10-bit ADC measures each
input and compares the result to one overvoltage and
one undervoltage limit. A fault signal asserts when a
monitored voltage falls outside the set limits.
The MAX16067 supports a power-supply voltage of up to
14V and can be powered directly from the 12V interme-
diate bus in many systems.
The integrated sequencer provides precise control over
the power-up and power-down order of up to six power
supplies. Three outputs (EN_OUT1 to EN_OUT3) are
configurable with charge-pump outputs to directly drive
external n-channel MOSFETs.
The MAX16067 includes six programmable general-
purpose inputs/outputs (GPIOs). GPIOs are flash con-
figurable as a fault output, as a watchdog input or output,
or as a manual reset.
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The MAX16067 features nonvolatile fault memory for
recording information during system shutdown events.
The fault logger records a failure in the internal flash
and sets a lock bit protecting the stored fault data from
accidental erasure.
An SMBus™ or a JTAG serial interface configures the
MAX16067. The MAX16067 is available in a 32-pin, 5mm
x 5mm, TQFN package and is fully specified over the
-40NC to +85NC extended temperature range.
Features
S Operates from 2.8V to 14V
S 1% Accurate, 10-Bit ADC Monitors 6 Voltage
Inputs
S Analog EN Monitoring Input
S 6 Monitored Inputs with Overvoltage and
Undervoltage Limits
S Nonvolatile Fault Event Logger
S Power-Up and Power-Down Sequencing
Capability
S 6 Outputs for Sequencing/Power-Good Indicators
S 3 Configurable Charge-Pump Outputs
S Six General-Purpose Inputs/Outputs Configurable
as:
Dedicated Fault Output
Watchdog Timer Function
Manual Reset
SMBus Alert
Fault Propagation Input/Output
S SMBus and JTAG Interface
S Supports Cascading with MAX16065/MAX16066
S Flash-Configurable Time Delays and Thresholds
S -40NC to +85NC Extended Operating Temperature
Range
Applications
Networking Equipment
Telecom Equipment (Base Stations, Access)
Storage/Raid Systems
Servers
Typical Operating Circuit appears at end of data sheet.
Ordering Information/Selector Guide
PART
PIN-PACKAGE
VOLTAGE-
DETECTOR INPUTS
GENERAL-PURPOSE
INPUTS/OUTPUTS
MAX16067ETJ+
32 TQFN-EP*
6
6
Note: This device is specified over the -40NC to +85NC extended temperature range.
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
SEQUENCING
OUTPUTS
6
SMBus is a trademark of Intel Corp.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1 page  
6-Channel, Flash-Configurable System Manager
with Nonvolatile Fault Registers
SDA
tSU:DAT
tLOW
SCL
tHD:STA
START
CONDITION
tHIGH
tR tF
Figure 1. SMBus Timing Diagram
tHD:DAT
tSU:STA
tHD:STA
REPEATED START
CONDITION
tSU:STO
tBUF
STOP
CONDITION
START
CONDITION
TCK
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t1
t2 t3
t4 t5
TDI, TMS
TDO
t6
t7
Figure 2. JTAG Timing Diagram
_______________________________________________________________________________________ 5
5 Page 
6-Channel, Flash-Configurable System Manager
with Nonvolatile Fault Registers
Table 1. Current Sequencer Slot
REGISTER
ADDRESS
BIT RANGE
Current-sequencer state
0000 = Slot0
0001 = Slot1
0010 = Slot2
0011 = Slot3
21h
[3:0]
0100 = Slot4
0101 = Slot5
0110 = Slot6
0111 = Power-on mode
1000 = Fault state
1001 to 1111 = Unused
[7:4]
Reserved
DESCRIPTION
A sequencing delay occurs between each slot and is
configured in registers 77h–7Dh as shown in Table 2.
Each sequencing delay is stored as an 8-bit value and
is calculated as follows:
( )tSEQ = 5 ×10 −6 × 2a × (16 + b)
where tSEQ is in seconds, a is the decimal value of the
4 MSBs and b is the decimal value of the 4 LSBs. See
Table 3 for example calculations.
Enable Input (EN)
To initiate sequencing and enable monitoring, the volt-
www.DataaSgheeeat4tUE.cNommust be above 1.24V (typ) and the software
enable bit in r73h[0] must be set to ‘1.’ To power down
and disable monitoring, either pull EN below 1.215V
(typ) or set the software enable bit to ‘0.’ See Table 4 for
the software enable bit configurations. Connect EN to
ABP if not used.
If a fault condition occurs during the power-up cycle,
the EN_OUT_ outputs are powered down immediately,
regardless of the state of EN. In the monitoring state,
if EN falls below the threshold, the sequencing state
machine begins the power-down sequence. If EN rises
above the threshold during the power-down sequence,
the sequence state machine continues the power-down
sequence until all the channels are powered off and then
the device immediately begins the power-up sequence.
When in the monitoring state, and when EN falls below
the undervoltage threshold, a register bit, ENRESET
(r20h[2]), is set to a ‘1.’ This register bit latches and must
be cleared through software. This bit indicates if RESET
asserted low due to EN going under the threshold. The
POR state of ENRESET is ‘0’. The bit is only set on a fall-
ing edge of the EN comparator output or the software
enable bit. If operating in latch-on fault mode, toggle
EN or toggle the software enable bit to clear the latch
condition and restart the device once the fault condition
has been removed.
Table 2. Slot Delay Register
REGISTER
ADDRESS
77h
78h
79h
7Ah
7Bh
7Ch
7Dh
FLASH
ADDRESS
277h
278h
279h
27Ah
27Bh
27Ch
27Dh
BIT RANGE
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
[7:0]
DESCRIPTION
Sequence slot 0 to slot 1 delay
Sequence slot 1 to slot 2 delay
Sequence slot 2 to slot 3 delay
Sequence slot 3 to slot 4 delay
Sequence slot 4 to slot 5 delay
Sequence slot 5 to slot 6 delay
Sequence slot 6 to power-on state delay
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MAX16067.PDF ] | |
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