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PDF MAX16065 Data sheet ( Hoja de datos )

Número de pieza MAX16065
Descripción (MAX16065 / MAX16066) Flash-Configurable System Managers
Fabricantes Maxim Integrated Products 
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No Preview Available ! MAX16065 Hoja de datos, Descripción, Manual

19-4717; Rev 0; 7/09
12-Channel/8-Channel, Flash-Configurable System
Managers with Nonvolatile Fault Registers
General Description
The MAX16065/MAX16066 flash-configurable system
managers monitor and sequence multiple system volt-
ages. The MAX16065/MAX16066 can also accurately
monitor (±2.5%) one current channel using a dedicated
high-side current-sense amplifier. The MAX16065 man-
ages up to twelve system voltages simultaneously, and
the MAX16066 manages up to eight supply voltages.
These devices integrate a selectable differential or sin-
gle-ended analog-to-digital converter (ADC) and con-
figurable outputs for sequencing power supplies. Device
configuration information, including overvoltage and
undervoltage limits, timing settings, and the sequenc-
ing order is stored in nonvolatile flash memory. During a
fault condition, fault flags and channel voltages can be
automatically stored in the nonvolatile flash memory for
later read-back.
The internal 1% accurate 10-bit ADC measures each
input and compares the result to one overvoltage, one
undervoltage, and one early warning limit that can be
configured as either undervoltage or overvoltage. A fault
signal asserts when a monitored voltage falls outside the
set limits. Up to three independent fault output signals
are configurable to assert under various fault conditions.
Because the MAX16065/MAX16066 support a power-
supply voltage of up to 14V, they can be powered
directly from the 12V intermediate bus in many systems.
The integrated sequencer provides precise control over
www.DatatShheeept4oUw.ceorm-up and power-down order of up to twelve
(MAX16065) or up to eight (MAX16066) power supplies.
Eight outputs (EN_OUT1–EN_OUT8) are configurable
with charge-pump outputs to directly drive external
n-channel MOSFETs.
The MAX16065/MAX16066 include eight/six programma-
ble general-purpose inputs/outputs (GPIO_s). GPIO_s
are flash configurable as dedicated fault outputs, as a
watchdog input or output, or as a manual reset.
The MAX16065/MAX16066 feature nonvolatile fault mem-
ory for recording information during system shutdown
events. The fault logger records a failure in the internal
flash and sets a lock bit protecting the stored fault data
from accidental erasure. An SMBus™ or a JTAG serial
interface configures the MAX16065/MAX16066. The
MAX16065 is available in a 48-pin, 7mm x 7mm, TQFN
package, and the MAX16066 is available in a 40-pin,
6mm x 6mm, TQFN package. Both devices are fully
specified from -40NC to +85NC.
SMBus is a trademark of Intel Corp.
Features
S Operate from 2.8V to 14V
S ±2.5% Current-Monitoring Accuracy
S 1% Accurate 10-Bit ADC Monitors 12/8 Voltage
Inputs
S Single-Ended or Differential ADC for System
Voltage/Current Monitoring
S Integrated High-Side Current-Sense Amplifier
S 12/8 Monitored Inputs with Overvoltage/
Undervoltage/Early Warning Limit
S Nonvolatile Fault Event Logger
S Power-Up and Power-Down Sequencing
Capability
S Independent Secondary Sequence Block
S 12/8 Outputs for Sequencing/Power-Good
Indicators
S Two Programmable Fault Outputs and One Reset
Output
S Eight General-Purpose Inputs/Outputs
Configurable as:
Dedicated Fault Outputs
Watchdog Timer Function
Manual Reset
Margin Enable
S SMBus (with Timeout) or JTAG Interface
S Flash Configurable Time Delays and Thresholds
S -40NC to +85NC Operating Temperature Range
Applications
Networking Equipment
Telecom Equipment (Base Stations, Access)
Storage/Raid Systems
Servers
Ordering Information
PART
MAX16065ETM+
MAX16066ETL+
TEMP RANGE
-40NC to +85NC
-40NC to +85NC
PIN-PACKAGE
48 TQFN-EP*
40 TQFN-EP*
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Pin Configuration and Typical Operating Circuits appear at
end of data sheet.
________________________________________________________________ Maxim Integrated Products   1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.

1 page




MAX16065 pdf
12-Channel/8-Channel, Flash-Configurable System
Managers with Nonvolatile Fault Registers
ELECTRICAL CHARACTERISTICS
(VCC = 2.8V to 14V, TA = -40NC to +85NC, unless otherwise specified. Typical values are at ABP = DBP = VCC = 3.3V, TA = +25NC.)
(Note 1)
PARAMETER
Output Fall Time
Data Hold Time
Pulse Width of Spike Suppressed
JTAG INTERFACE
TDI, TMS, TCK Logic-Low Input
Voltage
TDI, TMS, TCK Logic-High Input
Voltage
TDO Logic-Output Low Voltage
TDO Logic-Output High Voltage
TDI, TMS Pullup Resistors
I/O Capacitance
TCK Clock Period
TCK High/Low Time
TCK to TMS, TDI Setup Time
TCK to TMS, TDI Hold Time
TCK to TDO Delay
TCK to TDO High-Z Delay
SYMBOL
tOF
tHD:DAT
tSP
CONDITIONS
CBUS = 10pF to 400pF
From 50% SCL falling to SDA change
VIL
VIH
VOL
VOH
RPU
CI/O
t1
t2, t3
t4
t5
t6
t7
Input voltage falling
Input voltage rising
ISINK = 3mA
ISOURCE = 200μA
Pullup to DBP
MIN TYP MAX UNITS
250 ns
0.3 0.9 μs
30 ns
0.8
2
0.4
2.4
40 50 60
5
1000
50 500
15
10
500
500
V
V
V
V
pF
ns
ns
ns
ns
ns
ns
Note 1: Specifications are guaranteed for the stated global conditions, unless otherwise noted. 100% production tested at TA =
+25NC and TA = +85NC. Specifications at TA = -40NC are guaranteed by design.
Note 2: For VCC of 3.6V or lower, connect VCC, DBP, and ABP together. For higher supply applications, connect only VCC to the
supply rail.
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MAX16065 arduino
12-Channel/8-Channel, Flash-Configurable System
Managers with Nonvolatile Fault Registers
Detailed Description
The MAX16065 manages up to twelve system power
supplies and the MAX16066 can manage up to eight
system power supplies. After boot-up, if EN is high and
the software enable bit is set to ‘1,’ a power-up sequence
begins based on the configuration stored in flash and
the EN_OUT_s are controlled accordingly. When the
power-up sequence is successfully completed, the
monitoring phase begins. An internal multiplexer cycles
through each MON_ input. At each multiplexer stop, the
10-bit ADC converts the monitored analog voltage to a
digital result and stores the result in a register. Each time
a conversion cycle (50Fs, max) completes, internal logic
circuitry compares the conversion results to the over-
voltage and undervoltage thresholds stored in memory.
When a result violates a programmed threshold, the
conversion can be configured to generate a fault. GPIO_
can be programmed to assert on combinations of faults.
Additionally, faults can be configured to shut off the sys-
tem and trigger the nonvolatile fault logger, which writes
all fault information automatically to the flash and write-
protects the data to prevent accidental erasure.
The MAX16065/MAX16066 contain both SMBus and
JTAG serial interfaces for accessing registers and flash.
Use only one interface at any given time. For more infor-
mation on how to access the internal memory through
these interfaces, see the SMBus-Compatible Interface
and JTAG Serial Interface sections. The memory map
is divided into three pages with access controlled by
www.DatasSpheeecti4aUl .ScoMmBus and JTAG commands.
The factory-default values at POR (power-on reset) for all
RAM registers are ‘0’s. POR occurs when VCC reaches
the undervoltage-lockout threshold (UVLO) of 2.8V (max).
At POR, the device begins a boot-up sequence. During
the boot-up sequence, all monitored inputs are masked
from initiating faults and flash contents are copied to
the respective register locations. During boot-up, the
MAX16065/MAX16066 are not accessible through the
serial interface. The boot-up sequence takes up to
150Fs, after which the device is ready for normal opera-
tion. RESET is asserted low up to the boot-up phase and
remains asserted for its programmed timeout period once
sequencing is completed and all monitored channels
are within their respective thresholds. Up to the boot-up
phase, the GPIO_s and EN_OUT_s are high impedance.
Power
Apply 2.8V to 14V to VCC to power the MAX16065/
MAX16066. Bypass VCC to ground with a 10FF capaci-
tor. Two internal voltage regulators, ABP and DBP,
supply power to the analog and digital circuitry within
the device. For operation at 3.6V or lower, disable the
regulators by connecting ABP and DBP to VCC.
ABP is a 3.0V (typ) voltage regulator that powers the inter-
nal analog circuitry. Bypass ABP to GND with a 1FF ceram-
ic capacitor installed as close to the device as possible.
DBP is an internal 3.0V (typ) voltage regulator. DBP
powers flash and digital circuitry. All push-pull outputs
refer to DBP. DBP supplies the input voltage to the inter-
nal charge pump when the programmable outputs are
configured as charge-pump outputs. Bypass the DBP
output to GND with a 1FF ceramic capacitor installed as
close as possible to the device.
Do not power external circuitry from ABP or DBP.
Sequencing
To sequence a system of power supplies safely, the
output voltage of a power supply must be good before
the next power supply may turn on. Connect EN_OUT_
outputs to the enable input of an external power supply
and connect MON_ inputs to the output of the power
supply for voltage monitoring. More than one MON_ can
be used if the power supply has multiple outputs.
Sequence Order
The MAX16065/MAX16066 provide a system of ordered
slots to sequence multiple power supplies. To determine
the sequence order, assign each EN_OUT_ to a slot
ranging from Slot 1 to Slot 12. EN_OUT_(s) assigned to
Slot 1 are turned on first, followed by outputs assigned
to Slot 2, and so on through Slot 12. Multiple EN_OUT_s
assigned to the same slot turn on at the same time.
Each slot includes a built-in configurable sequence delay
(registers r77h to r7Dh) ranging from 20Fs to 1.6s. During
a reverse sequence, slots are turned off in reverse order
starting from Slot 12. The MAX16065/MAX16066 can be
configured to power-down in simultaneous mode or in
reverse sequence mode as set in r75h[0]. See Tables 5
and 6 for the EN_OUT_ slot assignment bits, and Tables
3 and 4 for the sequence delays.
During power-up or power-down sequencing, the cur-
rent sequencer state can be found in r21h[4:0].
______________________________________________________________________________________   11

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