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PDF S-25C020A Data sheet ( Hoja de datos )
| Número de pieza | S-25C020A | |
| Descripción | (S-25C010A - S-25C040A) CMOS SPI SERIAL E2PROM | |
| Fabricantes | Seiko Instruments | |
| Logotipo |  |
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S-25C010A/020A/040A H Series
www.sii-ic.com
© Seiko Instruments Inc., 2010-2015
105°C OPERATION
SPI SERIAL E2PROM FOR AUTOMOTIVE
Rev.2.3_00_C
The S-25C010A/020A/040A H series devices are high-temperature operation SPI serial E2PROMs for automotive
components. The S-25C010A/020A/040A H series has the capacity of 1 K-bit, 2 K-bit, and 4 K-bit, and the organization is
128 words × 8-bit, 256 words × 8- bit, and 512 words × 8-bit, respectively.
Page write and sequential read are available.
Caution Before using the product in automobile control unit or medical equipment, contact to SII is indispensable.
Features
• Operating voltage range:
Read
Write
2.5 V to 5.5 V
2.5 V to 5.5 V
• Operation frequency:
6.5 MHz (4.5 V to 5.5 V)
• Write time:
4.0 ms max.
• SPI mode (0, 0) and (1, 1)
• Page write:
16 bytes / page
• Sequential read
• Monitors write to the memory by a status register
• Write protect:
Software, Hardware
Protect area:
25%, 50%, 100%
• Function to prevent malfunction by monitoring clock pulse
• Write protect function during the low power supply voltage
• CMOS schmitt input ( CS , SCK, SI, WP , HOLD )
• Endurance:
106cycles/word*1 (Ta = +85°C)
8 × 105 cycles/word*1 (Ta = +105°C)
• Data retention:
100 years (Ta = +25°C)
50 years (Ta = +105°C)
• Memory capacitance:
S-25C010A
1 K-bit
S-25C020A
2 K-bit
S-25C040A
4 K-bit
• Initial delivery state:
FFh, BP1 = 0, BP0 = 0
• Operation temperature range:
Ta = −40°C to +105°C
• Lead-free (Sn 100%), halogen-free*2
• AEC-Q100 qualified*3
*1. For each address (Word: 8-bit)
*2. Refer to “ Product Name Structure” for details.
*3. Contact our sales office for details.
Packages
• 8-Pin SOP (JEDEC)
• 8-Pin TSSOP
Seiko Instruments Inc.
1
1 page  
Rev.2.3_00_C
105°C OPERATION SPI SERIAL E2PROM FOR AUTOMOTIVE
S-25C010A/020A/040A H Series
DC Electrical Characteristics
Item
Current consumption (READ)
Table 8
Ta = −40°C to +105°C
Symbol
Condition
VCC = 2.5 V to 3.0 V VCC = 3.0 V to 4.5 V VCC = 4.5 V to 5.5 V
fSCK = 3.5 MHz
fSCK = 5.0 MHz
fSCK = 6.5 MHz
Min. Max. Min. Max. Min. Max.
ICC1
No load at
SO pin
−
1.5
−
2.0
−
2.5
Unit
mA
Item
Current consumption (WRITE)
Table 9
Ta = −40°C to +105°C
Symbol
Condition
VCC = 2.5 V to 3.0 V VCC = 3.0 V to 4.5 V VCC = 4.5 V to 5.5 V
fSCK = 3.5 MHz
fSCK = 5.0 MHz
fSCK = 6.5 MHz
Min. Max. Min. Max. Min. Max.
ICC2
No load at
SO pin
−
2.0
−
2.5
−
3.0
Unit
mA
Item
Standby current consumption
Input leakage current
Output leakage current
Low level output voltage
High level output voltage
Table 10
Symbol
Condition
Ta = −40°C to +105°C
VCC = 2.5 V to 4.5 V
VCC = 4.5 V to 5.5 V
Min. Max. Min. Max.
CS = VCC,
ISB
SO = Open
Other inputs are
−
8.0
− 10.0
VCC or GND
ILI VIN = GND to VCC
−
2.0
−
2.0
ILO VOUT = GND to VCC
−
2.0
−
2.0
VOL1 IOL = 2.0 mA
− − − 0.4
VOL2 IOL = 1.5 mA
− 0.4 − 0.4
VOH1 IOH = −2.0 mA
− − 0.8 × VCC −
VOH2 IOH = −0.4 mA
0.8 × VCC − 0.8 × VCC −
Unit
μA
μA
μA
V
V
V
V
Seiko Instruments Inc.
5
5 Page 
Rev.2.3_00_C
105°C OPERATION SPI SERIAL E2PROM FOR AUTOMOTIVE
S-25C010A/020A/040A H Series
Operation
1. Status register
The status register’s organization is below. The status register can Write and Read by a specific instruction.
b7 b6 b5 b4 b3 b2 b1 b0
1 1 1 1 BP1 BP0 WEL WIP
Block Protect
Write Enable Latch
Write In Progress
Figure 9 Organization of Status Register
The status/control bits of the status register are as follows.
1.1 BP1, BP0 (b3, b2) : Block protect
Bit BP1 and BP0 are composed of the nonvolatile bit. The area size of Software Protect with respect to WRITE
instructions is defined by the BP1 and BP0 bits. Rewriting these bits is possible by the WRSR instruction. To protect
the memory area against the WRITE instruction, set either or both of bit BP1 and BP0 to “1”. Rewriting bit BP1 and
BP0 is possible unless they are in Hardware Protect mode.
Refer to “ Protect Operation” for details of “Block Protect”.
1.2 WEL (b1) : Write enable latch
Bit WEL shows the status of internal Write Enable Latch. Bit WEL is set by the WREN instruction only. If bit WEL is
“1”, this is the status that Write Enable Latch is set. If bit WEL is “0”, Write Enable Latch is in reset, so that the S-
25C010A/020A/040A does not receive the WRITE or WRSR instruction. Bit WEL is reset after these operations;
• The power supply voltage is dropping
• Power-on
• After performing WRDI
• After the Write operation by the WRSR instruction
• After the Write operation by the WRITE instruction
• After setting the WP pin to “L”
Seiko Instruments Inc.
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet S-25C020A.PDF ] | |
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