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Número de pieza | 74CBTLV3126 | |
Descripción | 4-bit Bus Switch | |
Fabricantes | NXP Semiconductors | |
Logotipo | ||
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No Preview Available ! 74CBTLV3126
4-bit bus switch
Rev. 01 — 5 January 2010
Product data sheet
1. General description
The 74CBTLV3126 provides a 4-bit high-speed bus switch with separate output enable
inputs (1OE to 4OE). The low on-state resistance of the switch allows connections to be
made with minimal propagation delay. The switch is disabled (high-impedance OFF-state)
when the output enable (nOE) input is LOW.
To ensure the high-impedance OFF-state during power-up or power-down, nOE should be
tied to the GND through a pull-down resistor. The minimum value of the resistor is
determined by the current-sinking capability of the driver.
Schmitt trigger action at control input makes the circuit tolerant to slower input rise and fall
times across the entire VCC range from 2.3 V to 3.6 V.
This device is fully specified for partial power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
2. Features
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Supply voltage range from 2.3 V to 3.6 V
Standard ’126’-type pinout
High noise immunity
Complies with JEDEC standard:
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CDM AEC-Q100-011 revision B exceeds 1000 V
5 Ω switch connection between two ports
Rail to rail switching on data I/O ports
CMOS low power consumption
Latch-up performance exceeds 250 mA per JESD78B Class I level A
IOFF circuitry provides partial Power-down mode operation
Multiple package options
Specified from −40 °C to +85 °C and −40 °C to +125 °C
1 page NXP Semiconductors
74CBTLV3126
4-bit bus switch
Table 6. Static characteristics …continued
At recommended operating conditions voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Tamb = −40 °C to +85 °C
Min Typ[1] Max
IS(ON)
ON-state
VCC = 3.6 V; see Figure 7
leakage current
- - ±1
IOFF
ICC
ΔICC
CI
CS(OFF)
power-off
leakage current
supply current
additional
supply current
input
capacitance
OFF-state
capacitance
VI or VO = 0 V to 3.6 V;
VCC = 0 V
VI = GND or VCC; IO = 0 A;
VSW = GND or VCC;
VCC = 3.6 V
pin nOE; VI = VCC − 0.6 V;
VSW = GND or VCC;
VCC = 3.6 V
pin nOE; VCC = 3.3 V;
VI = 0 V to 3.3 V
VCC = 3.3 V; VI = 0 V to 3.3 V
[2]
-
-
-
-
-
- ±10
- 10
- 300
0.9 -
5.2 -
CS(ON) ON-state
capacitance
VCC = 3.3 V; VI = 0 V to 3.3 V
- 14.3 -
Tamb = −40 °C to +125 °C Unit
Min Max
- ±20 μA
- ±50 μA
- 50 μA
- 2000 μA
- - pF
- - pF
- - pF
[1] All typical values are measured at Tamb = 25 °C.
[2] One input at 3 V, other inputs at VCC or GND.
9.1 Test circuits
VIL
www.DataSheet4U.com A
IS
VI
VCC
nOE
nB
nA
GND
IS
A
VO
VIH
A
IS
VI
VCC
nOE
nA
nB
GND
VO
001aal249
Fig 6.
VI = VCC or GND and VO = GND or VCC.
Test circuit for measuring OFF-state leakage
current (one switch)
001aal250
Fig 7.
VI = VCC or GND and VO = open circuit.
Test circuit for measuring ON-state leakage
current (one switch)
74CBTLV3126_1
Product data sheet
Rev. 01 — 5 January 2010
© NXP B.V. 2010. All rights reserved.
5 of 16
5 Page NXP Semiconductors
12. Package outline
74CBTLV3126
4-bit bus switch
SSOP16: plastic shrink small outline package; 16 leads; body width 3.9 mm; lead pitch 0.635 mm SOT519-1
D
y
Z
16
c
9
EA
X
HE v M A
www.DataSheet4U.com
1
e
A2
A1
8
wM
bp
(A3)
A
Lp
L
detail X
θ
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
UNIT
A
max.
A1
A2
A3
bp
c
D (1) E (1)
e
HE
mm
1.73
0.25
0.10
1.55
1.40
0.25
0.31
0.20
0.25
0.18
5.0
4.8
4.0
3.8
0.635
6.2
5.8
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
OUTLINE
VERSION
SOT519-1
IEC
REFERENCES
JEDEC
JEITA
L Lp v w y Z (1) θ
1
0.89
0.41
0.2
0.18
0.09
0.18
0.05
8o
0o
EUROPEAN
PROJECTION
ISSUE DATE
99-05-04
03-02-18
Fig 18. Package outline SOT519-1 (SSOP16)
74CBTLV3126_1
Product data sheet
Rev. 01 — 5 January 2010
© NXP B.V. 2010. All rights reserved.
11 of 16
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Páginas | Total 16 Páginas | |
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