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ICS8430B-71L fiches techniques PDF

Integrated Circuit Systems - CRYSTAL INTERFACE / LVCMOS-TO-3.3V LVPECL FREQUENCY SYNTHESIZER

Numéro de référence ICS8430B-71L
Description CRYSTAL INTERFACE / LVCMOS-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
Fabricant Integrated Circuit Systems 
Logo Integrated Circuit Systems 





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ICS8430B-71L fiche technique
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS8430B-71
700MHZ, LOW JITTER, CRYSTAL INTERFACE/
LVCMOS-TO-3.3V LVPECL FREQUENCY SYNTHESIZER
GENERAL DESCRIPTION
The ICS8430B-71 is a general purpose, dual out-
ICS put Crystal/LVCMOS-to-3.3V Differential LVPECL
HiPerClockS™ High Frequency Synthesizer and a member of the
HiPerClockS™ family of High Performance Clock
Solutions from ICS. The ICS8430B-71 has a se-
lectable crystal oscillator interface or LVCMOS TEST_CLK.
The VCO operates at a frequency range of 250MHz to
700MHz. With the output configured to divide the VCO
frequency by 2, output frequency steps as small as 2MHz
can be achieved using a 16MHz crystal or test clock. Output
frequencies up to 700MHz can be programmed using the
serial or parallel interfaces to the configuration logic. The low
jitter and frequency range of the ICS8430B-71 make it an
ideal clock generator for most clock tree applications.
FEATURES
Dual differential 3.3V LVPECL outputs
Selectable crystal oscillator interface
or LVCMOS TEST_CLK
Output frequency up to 700MHz
Crystal input frequency range: 12MHz to 27MHz
VCO range: 250MHz to 700MHz
Parallel or serial interface for programming counter
and output dividers
RMS period jitter: 9ps (maximum)
Cycle-to-cycle jitter: 25ps (maximum)
3.3V supply voltage
0°C to 70°C ambient operating temperature
Replaces 8430-71
Available in both standard and lead-free RoHS-compliant
packages
BLOCK DIAGRAM
PIN ASSIGNMENT
VCO_SEL
XTAL_SEL
www.DaTtEaSSTh_eCeLt4KU.com
0
XTAL_IN
XTAL_OUT
OSC 1
÷ 16
PLL
PHASE DETECTOR
32 31 30 29 28 27 26 25
M5 1
M6 2
M7 3
M8 4
N0 5
N1 6
N2 7
VEE 8
ICS8430B-71
24 XTAL_OUT
23 TEST_CLK
22 XTAL_SEL
2 1 VCCA
20 S_LOAD
19 S_DATA
18 S_CLOCK
17 MR
9 10 11 12 13 14 15 16
MR
S_LOAD
S_DATA
S_CLOCK
nP_LOAD
VCO
0
÷N
÷M 1
÷2
CONFIGURATION
INTERFACE
LOGIC
FOUT0
nFOUT0
FOUT1
nFOUT1
TEST
32-Lead LQFP
7mm x 7mm x 1.4mm package body
Y Package
Top View
M0:M8
N0:N2
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
8430BY-71
www.icst.com/products/hiperclocks.html
REV. A SEPTEMBER 20, 2005
1

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