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What is K4M51323LC-L?

This electronic component, produced by the manufacturer "Samsung semiconductor", performs the same function as "Mobile-SDRAM".


K4M51323LC-L Datasheet PDF - Samsung semiconductor

Part Number K4M51323LC-L
Description Mobile-SDRAM
Manufacturers Samsung semiconductor 
Logo Samsung semiconductor Logo 


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K4M51323LC - S(D)N/G/L/F
Mobile-SDRAM
4M x 32Bit x 4 Banks Mobile SDRAM in 90FBGA
FEATURES
• VDD/VDDQ = 2.5V/2.5V
• LVCMOS compatible with multiplexed address.
• Four banks operation.
• MRS cycle with address key programs.
-. CAS latency (1, 2 & 3).
-. Burst length (1, 2, 4, 8 & Full page).
-. Burst type (Sequential & Interleave).
• EMRS cycle with address key programs.
• All inputs are sampled at the positive going edge of the system
clock.
• Burst read single-bit write operation.
• Special Function Support.
-. PASR (Partial Array Self Refresh).
-. Internal TCSR (Temperature Compensated Self Refresh)
• DQM for masking.
• Auto refresh.
• 64ms refresh period (8K cycle).
• Commercial Temperature Operation (-25°C ~ 70°C).
• Extended Temperature Operation (-25°C ~ 85°C).
• 90Balls FBGA ( -SXXX -Pb, -DXXX -Pb Free).
GENERAL DESCRIPTION
The K4M51323LC is 536,870,912 bits synchronous high data
rate Dynamic RAM organized as 4 x 4,196,304 words by 32 bits,
fabricated with SAMSUNG’s high performance CMOS technol-
ogy. Synchronous design allows precise cycle control with the
use of system clock and I/O transactions are possible on every
clock cycle. Range of operating frequencies, programmable
burst lengths and programmable latencies allow the same
device to be useful for a variety of high bandwidth and high per-
formance memory system applications.
ORDERING INFORMATION
Part No.
Max Freq.
K4M51323LC-S(D)N/G/L/F75
133MHz(CL=3), 111MHz(CL=2)
K4M51323LC-S(D)N/G/L/F7L*1
133MHz(CL=3), 83MHz(CL=2)
- S(D)N/G : Low Power, Extended Temperature(-25°C ~ 85°C)
- S(D)L/F : Low Power, Commercial Temperature(-25°C ~ 70°C)
www.DataSheet4U.com
NOTES :
1. In case of 40MHz Frequency, CL1 can be supported.
Interface
LVCMOS
Package
90 FBGA Pb
(Pb Free)
Address configuration
Organization
16Mx32
Bank
BA0,BA1
Row
A0 - A12
Column Address
A0 - A8
INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE.
NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,
TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL INFORMATION IN THIS DOCUMENT IS PRO-
VIDED ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND.
1. For updates or additional information about Samsung products, contact your nearest Samsung office.
2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar applications where Product failure could
result in loss of life or personal or physical harm, or any military or defense application, or any governmental procurement to which special terms or pro-
visions may apply.
1 March 2006

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K4M51323LC-L equivalent
K4M51323LC - S(D)N/G/L/F
Mobile-SDRAM
DC CHARACTERISTICS
Recommended operating conditions (Voltage referenced to VSS = 0V, TA = -25 to 85°C for Extended, -25 to 70°C for Commercial)
Parameter
Symbol
Test Condition
Version
-75 -7L
Unit Note
Operating Current
(One Bank Active)
Burst length = 1
ICC1 tRC tRC(min)
IO = 0 mA
110 110 mA 1
Precharge Standby Current
in power-down mode
Precharge Standby Current
in non power-down mode
ICC2P CKE VIL(max), tCC = 10ns
ICC2PS CKE & CLK VIL(max), tCC =
ICC2N
CKE VIH(min), CS VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
ICC2NS
CKE VIH(min), CLK VIL(max), tCC =
Input signals are stable
1.0
1.0
15
5
mA
mA
Active Standby Current
in power-down mode
Active Standby Current
in non power-down mode
(One Bank Active)
ICC3P CKE VIL(max), tCC = 10ns
ICC3PS CKE & CLK VIL(max), tCC =
ICC3N
CKE VIH(min), CS VIH(min), tCC = 10ns
Input signals are changed one time during 20ns
ICC3NS
CKE VIH(min), CLK VIL(max), tCC =
Input signals are stable
8
8
30
20
mA
mA
mA
Operating Current
(Burst Mode)
ICC4
IO = 0 mA
Page burst
4Banks Activated
tCCD = 2CLKs
150 105 mA 1
Refresh Current
Self Refresh Current
www.DataSheet4U.com
ICC5 tRC tRC(min)
ICC6 CKE 0.2V
-G/F
-N/L
Internal TCSR
Full Array
1/2 of Full Array
1/4 of Full Array
180 180 mA 2
800 uA
45 *4
500
85/70 °C 3
800
450 700 uA
425 625
NOTES:
1. Measured with outputs open.
2. Refresh period is 64ms.
3. Internal TCSR can be supported.
In commercial Temp : 45°C/70°C, In extended Temp : 45°C/85°C
4. It has +/-5 °C tolerance.
5. Unless otherwise noted, input swing IeveI is CMOS(VIH /VIL=VDDQ/VSSQ).
5 March 2006


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