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PDF ADUM7442 Data sheet ( Hoja de datos )

Número de pieza ADUM7442
Descripción (ADUM7440 - ADUM7442) 1 KV RMS Quad-Channel Digital Isolator
Fabricantes Analog Devices 
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Data Sheet
1 kV RMS Quad-Channel Digital Isolators
ADuM7440/ADuM7441/ADuM7442
FEATURES
Small, 16-lead QSOP
1000 V rms isolation rating
Safety and regulatory approvals
UL recognition
UL 1577: 1000 V rms for 1 minute
Low power operation
5 V operation
2.25 mA per channel maximum at 0 Mbps to 1 Mbps
11.5 mA per channel maximum at 25 Mbps
3.3 V operation
1.5 mA per channel maximum at 0 Mbps to 1 Mbps
8.25 mA per channel maximum at 25 Mbps
Bidirectional communication
Up to 25 Mbps data rate (NRZ)
3 V/5 V level translation
High temperature operation: 105°C
High common-mode transient immunity: >15 kV/μs
APPLICATIONS
General-purpose, multichannel isolation
SPI interface/data converter isolation
RS-232/RS-422/RS-485 transceivers
Industrial field bus isolation
GENERAL DESCRIPTION
The ADuM7440/ADuM7441/ADuM74421 are 4-channel digital
isolators based on the Analog Devices, Inc., iCoupler® technology.
Combining high speed CMOS and monolithic air core transformer
technologies, these isolation components provide outstanding
performance characteristics superior to the alternatives, such as
optocoupler devices and other integrated couplers.
The ADuM7440/ADuM7441/ADuM7442 family of quad 1 kV
digital isolation devices is packaged in a small 16-lead QSOP.
While most 4-channel isolators come in 16-lead wide SOIC
packages, the ADuM7440/ADuM7441/ADuM7442 free almost
70% of board space and yet can still withstand high isolation
voltage and meet UL regulatory requirements. In addition to the
space savings, the ADuM7440/ADuM7441/ADuM7442 offer a
lower price than 2.5 kV or 5 kV isolators where only functional
isolation is needed.
This family, like many Analog Devices isolators, offers very low
power consumption, consuming one-tenth to one-sixth the
power of comparable isolators at comparable data rates up to
25 Mbps. Despite the low power consumption, all models of the
ADuM7440/ADuM7441/ADuM7442 provide low pulse width
distortion (<5 ns for C grade). In addition, every model has an
input glitch filter to protect against extraneous noise disturbances.
The ADuM7440/ADuM7441/ADuM7442 isolators provide
four independent isolation channels in a variety of channel
configurations and two data rates (see the Ordering Guide) up to
25 Mbps. All models operate with the supply voltage on either side
ranging from 3.0 V to 5.5 V, providing compatibility with lower
voltage systems as well as enabling voltage translation functionality
across the isolation barrier. All products also have an output
default high logic state in the absence of the input power.
1 Protected by U.S. Patents 5,952,849, 6,873,065 and 7,075,329. Other patents
pending.
VDD1A 1
GND1 2
VIA 3
ADuM7440
ENCODE
DECODE
VIB 4
ENCODE
DECODE
VIC 5
ENCODE
DECODE
VID 6
VDD1B 7
GND1 8
ENCODE
DECODE
Figure 1. ADuM7440
16 VDD2A
15 GND2
14 VOA
13 VOB
12 VOC
11 VOD
10 VDD2B
9 GND2
FUNCTIONAL BLOCK DIAGRAMS
VDD1A 1
GND1 2
VIA 3
VIB 4
ADuM7441
ENCODE
ENCODE
DECODE
DECODE
VIC 5
ENCODE
DECODE
VOD 6
VDD1B 7
GND1 8
DECODE
ENCODE
Figure 2. ADuM7441
16 VDD2A
15 GND2
14 VOA
13 VOB
12 VOC
11 VID
10 VDD2B
9 GND2
VDD1A 1
GND1 2
VIA 3
VIB 4
ADuM7442
ENCODE
ENCODE
DECODE
DECODE
VOC 5
DECODE
ENCODE
VOD 6
VDD1B 7
GND1 8
DECODE
ENCODE
Figure 3. ADuM7442
16 VDD2A
15 GND2
14 VOA
13 VOB
12 VIC
11 VID
10 VDD2B
9 GND2
Rev. D
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2009–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

1 page




ADUM7442 pdf
Data Sheet
ADuM7440/ADuM7441/ADuM7442
ELECTRICAL CHARACTERISTICS—MIXED 5 V/3.3 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = 5 V, VDD2 = 3.3 V. Minimum/maximum specifications apply over the entire recommended
operation range of 4.5 V ≤ VDD1 ≤ 5.5 V, 3.0 V ≤ VDD2 ≤ 3.6 V; and −40°C ≤ TA ≤ +105°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 7.
Parameter
SWITCHING SPECIFICATIONS
Data Rate
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Pulse Width
Propagation Delay Skew1
Channel Matching
Codirectional
Opposing-Direction
Jitter
Symbol
A Grade
C Grade
Min Typ Max Min Typ Max Unit
Test Conditions/Comments
1 25 Mbps Within PWD limit
tPHL, tPLH
55 80
30 42 55
ns
50% input to 50% output
PWD
10 25
2 5 ns |tPLH − tPHL|
5 3 ps/°C
PW 250
40
ns Within PWD limit
tPSK 20 10 ns
tPSKCD
tPSKOD
25
30
2
25
36
2
ns
ns
ns
1 tPSK is the magnitude of the worst-case difference in tPHL or tPLH that is measured between units at the same operating temperature, supply voltages, and output load
within the recommended operating conditions.
Table 8.
Parameter
SUPPLY CURRENT
Symbol
1 Mbps—A, C Grades
Min Typ Max
25 Mbps—C Grade
Min Typ Max
Unit Test Conditions/Comments
ADuM7440
ADuM7441
ADuM7442
IDD1
IDD2
IDD1
IDD2
IDD1
IDD2
4.4 5.5
1.6 2.1
3.7 5.0
2.2 2.8
3.2 3.9
2.0 2.6
28 35
3.5 4.5
19 27
5.2 7.0
15 20
7.8 12
mA
mA
mA
mA
mA
mA
Table 9. For All Models
Parameter
DC SPECIFICATIONS
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Logic Low Output Voltages
Input Current per Channel
Supply Current per Channel
Quiescent Input Supply Current
Quiescent Output Supply Current
Dynamic Input Supply Current
Dynamic Output Supply Current
AC SPECIFICATIONS
Output Rise/Fall Time
Common-Mode Transient Immunity1
Refresh Rate
Symbol Min Typ Max Unit
Test Conditions/Comments
VIH 0.7 VDDx
V
VIL 0.3 VDDx V
VOH VDDx − 0.1 VDDx
V
VDDx − 0.4 VDDx − 0.2
V
VOL 0.0 0.1 V
0.2 0.4 V
II −10 +0.01 +10 µA
IOx = −20 µA, VIx = VIxH
IOx = −4 mA, VIx = VIxH
IOx = 20 µA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
0 V ≤ VIx ≤ VDDx
IDDI(Q)
IDDO(Q)
IDDI(D)
IDDO(D)
0.77
0.40
0.26
0.02
mA
mA
mA/Mbps
mA/Mbps
tR/tF
|CM|
fr
15
2.5
20
1.2
ns
kV/µs
Mbps
10% to 90%
VIx = VDDx, VCM = 1000 V,
transient magnitude = 800 V
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges.
Rev. D | Page 5 of 20

5 Page





ADUM7442 arduino
Data Sheet
ADuM7440/ADuM7441/ADuM7442
VDD1A
GND1*
VIA
VIB
VOC
VOD
VDD1B
GND1*
1
2
3
4
5
6
7
8
ADuM7442
TOP VIEW
(Not to Scale)
16 VDD2A
15 GND2*
14 VOA
13 VOB
12 VIC
11 VID
10 VDD2B
9 GND2*
*PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED. CONNECTING BOTH
TO GND1 IS RECOMMENDED. PIN 9 AND PIN 15 ARE INTERNALLY
CONNECTED. CONNECTING BOTH TO GND2 IS RECOMMENDED.
Figure 7. ADuM7442 Pin Configuration
Table 22. ADuM7442 Pin Function Descriptions
Pin No. Mnemonic Description
1
VDD1A
Supply Voltage A for Isolator Side 1 (3.0 V to 5.5 V). Pin 1 must be connected externally to Pin 7. Connect a ceramic
bypass capacitor of value 0.01 μF to 0.1 μF between VDD1A (Pin 1) and GND1 (Pin 2).
2
GND1
Ground 1. Ground reference for Isolator Side 1. Pin 2 and Pin 8 are internally connected, and connecting both to GND1 is
recommended.
3 VIA
Logic Input A.
4 VIB
Logic Input B.
5 VOC
Logic Output C.
6 VOD
Logic Output D.
7 VDD1B Supply Voltage B for Isolator Side 1 (3.0 V to 5.5 V). Pin 7 must be connected externally to Pin 1. Connect a ceramic
bypass capacitor of value 0.01 μF to 0.1 μF between VDD1B (Pin 7) and GND1 (Pin 8).
8
GND1
Ground 1. Ground reference for Isolator Side 1. Pin 2 and Pin 8 are internally connected, and connecting both to GND1 is
recommended.
9
GND2
Ground 2. Ground reference for Isolator Side 2. Pin 9 and Pin 15 are internally connected, and connecting both to GND2 is
recommended.
10 VDD2B
Supply Voltage B for Isolator Side 2 (3.0 V to 5.5 V). Pin 10 must be connected externally to Pin 16. Connect a ceramic
bypass capacitor of value 0.01 μF to 0.1 μF between VDD2B (Pin 10) and GND2 (Pin 9).
11 VID
Logic Input D.
12 VIC
Logic Input C.
13 VOB
Logic Output B.
14 VOA
Logic Output A.
15 GND2 Ground 2. Ground reference for Isolator Side 2. Pin 9 and Pin 15 are internally connected, and connecting both to GND2 is
recommended.
16 VDD2A
Supply Voltage A for Isolator Side 2 (3.0 V to 5.5 V). Pin 16 must be connected externally to Pin 10. Connect a
ceramic bypass capacitor of value 0.01 μF to 0.1 μF between VDD2A (Pin 16) and GND2 (Pin 15).
Rev. D | Page 11 of 20

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