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PDF DDX8001 Data sheet ( Hoja de datos )
| Número de pieza | DDX8001 | |
| Descripción | Multi-channel Digital Audio Processor | |
| Fabricantes | Apogee Technology | |
| Logotipo |  |
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FEATURES
• 8 Channels of 24-Bit DDX®
• 100dB SNR and Dynamic Range
• 32kHz to 192kHz Input Sample Rates
• SACD/DSD Input (6 Channel)
• 24-bit to 36-bit Internal Processing
• Digital Gain/Attenuation +58dB to
–100dB in 0.5dB steps
• Up to 10 Independent 32-bit User
Programmable Biquads (EQ) per
Channel
• I2C Control
• 8 Channel I2S Inputs and Outputs
• 3.3V Single Supply Operation
• Individual Channel, Master, and
Channel Trim Gain/Attenuation
• Bass/Treble Tone Control
• Dual 8-Input Mix, Pre and Post EQ, per
channel
• Dual Independent Programmable
Limiters/Compressors
• Automodes™
* 5-Band Graphic EQ
* 32 Preset EQ Curves
* All 5.1 Bass Management Configs
* 8 Preset Crossover Filters
* Auto Volume Controlled Loudness
* 5.1 to 2 Channel Downmix
* 3 Preset Volume Curves
* 2 Preset Anti-Clipping Modes
* Preset Nighttime Listening Mode
* Preset TV AGC
www.Data•SheeInt4pUu.ctomand I2S Output Channel Mapping
• AM Noise Reduction and PWM
Frequency Shifting Modes
• Soft Volume and Muting
• Auto Zero Detect and Invalid Input
Detect Muting
• Selectable DDX® Ternary or Binary
PWM output + Variable PWM Speeds
• Internal Processing Loop-Through For
Up To 40 Biquads / 2-Channels
• QSurround5.1*
* Provided only under License of QSound Labs, Inc.
DDX-8001
DDX Multi-channel
Digital Audio Processor
1.0 GENERAL DESCRIPTION
The DDX-8001 is a single chip solution for digital audio
processing and digital amplifier control, featuring output
capabilities for DDX® (Direct Digital Amplification). In
conjunction with a DDX® power device, it provides high-
quality, high-efficiency, all digital amplification. The device
is extremely versatile allowing for input of nearly all digital
formats including 6.1/7.1 channel, 192kHz/24-bit DVD-Audio,
and SACD. In 5.1 applications the additional two channels
can be used for line-out or headphone drive.
Also provided in the DDX-8001 are a full assortment of
digital processing features. This includes up to 10
programmable 32-bit biquads (EQ) per channel, bass/treble
tone control, and dual 8-input mixing blocks per channel.
Automodes™ enable a time-to-market advantage by
substantially reducing the amount of software development
needed for certain functions. This includes all possible 5.1
bass management configurations with simple large/small/off
control settings. New advanced AM radio mode solves one
of the most common concerns using switching power
amplifiers.
The serial audio data input and output interfaces accept all
possible formats, including the popular I2S format. Eight
channels of DDX® processing are provided with capabilities
of controlling the output switching frequency or modulation.
This high quality conversion from PCM audio to DDX’s
patented tri-state PWM switching waveform provides over
100dB SNR and dynamic range.
The DDX-8001 is a 4th generation DDX® controller and is
uniquely suited for the most demanding applications,
providing an audiophile experience without parallel.
Specifications are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 email: [email protected]
CONTROLLED DOCUMENT: P_903-000040_Rev19 DDX-8001 Data Sheet.doc
DRN: PRELIMINARY Page 1 of 49
1 page  
DDX-8001
Pin I/O Pin Name
7 I SDI_56/DSD_5
8 I SDI_34/DSD_4
9 I SDI_12/DSD_3
10 I LRCKI/DSD_2
11 I BICKI/DSD_1
15 I RESET
16 I PLL_BYPASS
17 I SA
18 I/O SDA
19 I SCL
20 I XTI
21 I FILTER_PLL
23 GNDA
24 I VDDA
25 O CKOUT
29 O OUT8B
30 O OUT8A
31 O OUT7B
32 O OUT7A
33 O OUT6B
34 O OUT6A
38 O OUT5B
39 O OUT5A
40 O OUT4B
41 O OUT4A
42 O OUT3B
www.Data4S3heet4UO.comOUT3A
47 O OUT2B
48 O OUT2A
49 O OUT1B
50 O OUT1A
51 O EAPD
55 O BICKO
56 O LRCKO
57 O SDO_12
58 O SDO_34
62 O SDO_56
63 O SDO_78
64 I PWDN
Table 1 - Pin Description and Numbering
Description
Input Serial Data Channels 5 & 6/
DSD Input Channel 5
Input Serial Data Channels 3 & 4/
DSD Input Channel 4
Input Serial Data Channels 1 & 2/
DSD Input Channel 3
Input Left/Right Clock/ DSD Input Channel 2
Input Serial Clock/ DSD Input Channel 1
Global Reset
Bypass Phase Locked Loop
Select Address (I2C)
I2C Serial Data
I2C Serial Clock
Clock Input
PLL Filter
PLL Ground
PLL Supply
Clock Output
PWM Channel 8 Output B
PWM Channel 8 Output A
PWM Channel 7 Output B
PWM Channel 7 Output A
PWM Channel 6 Output B
PWM Channel 6 Output A
PWM Channel 5 Output B
PWM Channel 5 Output A
PWM Channel 4 Output B
PWM Channel 4 Output A
PWM Channel 3 Output B
PWM Channel 3 Output A
PWM Channel 2 Output B
PWM Channel 2 Output A
PWM Channel 1 Output B
PWM Channel 1 Output A
Ext. Amp Power Down
Output Serial Clock
Output Left/Right Clock
Output Serial Data Channels 1&2
Output Serial Data Channels 3&4
Output Serial Data Channels 5&6
Output Serial Data Channels 7&8
Device Powerdown
Pad Type
5V Tolerant TTL Input Buffer
5V Tolerant TTL Input Buffer
5V Tolerant TTL Input Buffer
5V Tolerant TTL Input Buffer
5V Tolerant TTL Input Buffer
5V Tolerant TTL Schmitt Trigger Input Buffer
5V Tolerant TTL Input with Pull-Down
5V Tolerant TTL Input with Pull-Down
Bidirectional Buffer: 5 V Tolerant TTL Schmitt
Trigger Input; 3.3V Capable 2 mA Slew-rate
control Output;
5V Tolerant TTL Schmitt Trigger Input Buffer
5V Tolerant TTL Schmitt Trigger Input Buffer
Analog Pad
Analog Ground
3.3V Analog Power Supply Voltage
3.3 V Capable TTL Tristate 4 mA Output Buffer
3.3V Capable TTL 2mA Output Buffer
3.3V Capable TTL 2mA Output Buffer
3.3V Capable TTL 2mA Output Buffer
3.3V Capable TTL 2mA Output Buffer
3.3V Capable TTL 2mA Output Buffer
3.3V Capable TTL 2mA Output Buffer
3.3V Capable TTL 2mA Output Buffer
3.3V Capable TTL 2mA Output Buffer
3.3V Capable TTL 2mA Output Buffer
3.3V Capable TTL 2mA Output Buffer
3.3V Capable TTL 2mA Output Buffer
3.3V Capable TTL 2mA Output Buffer
3.3V Capable TTL 2mA Output Buffer
3.3V Capable TTL 2mA Output Buffer
3.3V Capable TTL 2mA Output Buffer
3.3V Capable TTL 2mA Output Buffer
3.3V Capable TTL 2mA Output Buffer
3.3V Capable TTL 2mA Output Buffer
3.3V Capable TTL 2mA Output Buffer
3.3V Capable TTL 2mA Output Buffer
3.3V Capable TTL 2mA Output Buffer
3.3V Capable TTL 2mA Output Buffer
3.3V Capable TTL 2mA Output Buffer
5V Tolerant TTL Schmitt Trigger Input Buffer
Specifications are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 email: [email protected]
CONTROLLED DOCUMENT: P_903-000040_Rev19 DDX-8001 Data Sheet.doc
DRN: PRELIMINARY Page 5 of 49
5 Page 
DDX-8001
1.6.3
1
0.5
Performance of Analog Line Output (continued)
1
0.5
0.2
0.1
0.05
%
0.02
0.01
0.005
0.2
0.1
0.05
%
0.02
0.01
0.005
0.002
0.001
100m
200m
300m
400m 500m 600m 700m
V
900m 1
2
Figure 11 - THD vs. Voltage RMS , 1kHz
3
0.002
0.001
20
50 100 200
500
Hz
1k
2k
5k 10k
Figure 12 - THD vs. Frequency, 1Vrms
20k
1.7 PIN CONNECTION (Top View)
www.DataSheet4U.com
MVO/DSD_CLK
GND
VDD3.3
GND
NC
SDI78/DSD_6
SDI56/DSD_5
SDI34/DSD_4
SDI12/DSD_3
LRCKI/DSD_2
BICKI/DSD_1
VDD3.3
GND
NC
RESET
PLLB
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
1 48
2 47
3 46
4 45
5 44
6 43
7 42
8 41
9 40
10 39
11 38
12 37
13 36
14 35
15 34
16 33
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
OUT2A
OUT2B
NC
GND
VDD3.3
OUT3A
OUT3B
OUT4A
OUT4B
OUT5A
OUT5B
NC
GND
VDD3.3
OUT6A
OUT6B
Figure 13 – Pin Connection Diagram.
Specifications are subject to change without notice.
129 Morgan Drive, Norwood, MA 02062 voice: (781) 551-9450 fax: (781) 440-9528 email: [email protected]
CONTROLLED DOCUMENT: P_903-000040_Rev19 DDX-8001 Data Sheet.doc
DRN: PRELIMINARY Page 11 of 49
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet DDX8001.PDF ] | |
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