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PDF S1D16501 Data sheet ( Hoja de datos )

Número de pieza S1D16501
Descripción LCD Drivers
Fabricantes Epson Electronics 
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No Preview Available ! S1D16501 Hoja de datos, Descripción, Manual

MF425-05
ILECEDE1D3R9I4VECRoSntroller
S1RD71680010FS0e0rAies
Technical Manual

1 page




S1D16501 pdf
Selection Guide
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5 Page





S1D16501 arduino
4. PIN DESCRIPTION
S1D16006 Series
Pin name
I/O
Function
Number
of pins
O0 ~ O79
O
Segment (column) output for LCD driving
The output changes at the LP falling edge.
80
D0 ~ D3
I Display data input
4
XSCL
I Display data shift clock input (Falling edge trigger)
1
LP I Display data latch pulse input (Falling edge trigger)
1
Enable input/output
EIO1, EIO2
I/O
To be set to input or output according to the SHL input level.
The output is reset by the LP input. Upon the end of fetching of
80-bit data, the system starts up automatically to HIGH.
2
Shift direction selection and EIO pin I/O control input When data
is input to (D3, D2 ... D0 ) pins sequentially in order of (a3, a2,
a1, a0), (b3, b2, b1, b0) ... (t3, t2, t1, t0), the relationship
between the data and segment output becomes as shown in the
table below:
SHL I
O Output
SHL
79 78 77
2
EIO
1 0 EIO1 EIO2
LOW a3 b2 c1 . . . t2 t1 t0 Output Input
HIGH t0 t1 t2 . . . a1 a2 a3 Input Output
1
(Note) The relationship between the data and segment output is
determined irrespective of the number of shift clock
inputs.
FR
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VDD, VSS
I LCD drive output AC converted signal input
I Force input of blank
V0 level is forcibly set by entering LOW level (available with
**S1D16006D01 alone).
Power supply Logic power supply
VDD: 0 V VSS: –2.7 V to –5.5 V
1
1
2
V0, V2,
V3, V5
*1
Power supply
LCD drive circuit power supply
VDD: 0 V V5: –8 V to –28 V
VDD V0 V2 6/9 V5
3/9 V5 V3 V5
When used at a same potential, V0 and VDD are used by
grounding them close to the IC chip.
4
*1 Be sure to connect V0 to V5 to their LCD power, respectively.
Total: 100
**S1D16006D00 (including four NC’4)
**S1D16006D01 (including four NC’3)
Rev.2.1
EPSON
1–3

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