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PDF HMS1M32M8G Data sheet ( Hoja de datos )
| Número de pieza | HMS1M32M8G | |
| Descripción | SRAM MODULE 4Mbyte | |
| Fabricantes | Hanbit Electronics | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de HMS1M32M8G (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
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HANBit
HMS1M32M8G/Z8
HAN
BI T
SRAM MODULE 4Mbyte(1M x 32-Bit)
Part No. HMS1M32M8G, HMS1M32Z8
GENERAL DESCRIPTION
The HMS1M32M8G/Z8 is a high-speed static random access memory (SRAM) module containing 1,048,576
words organized in a x32-bit configuration. The module consists of eight 1M x 4 SRAMs mounted on a 72-pin,
double-sided, FR4-printed circuit board.
PD0 to PD3 identify the module’s density allowing interchangeable use of alternate density, industry- standard
modules. Eight chip enable inputs, (/CE1, /CE2, /CE3 and /CE4) are used to enable the module’s 4 bytes
independently. Output enable(/OE) and write enable(/WE) can set the memory input and output.
Data is written into the SRAM memory when write enable (/WE) and chip enable (/CE) inputs are both LOW.
Reading is accomplished when /WE remains HIGH and /CE and output enable (/OE) are LOW.
For reliability, this SRAM module is designed as multiple power and ground pin. All module components may be
powered from a single +5V DC power supply and all inputs and outputs are fully TTL-compatible.
FEATURES
Access times : 10, 12, 15, 17 and 20ns
PIN ASSIGNMENT
High-density 4MByte design
High-reliability, high-speed design
NC 2
PD3 4
PD0 6
Single + 5V ±10% power supply
DQ0 8
DQ1 10
Easy memory expansion /CE and /OE functions
All inputs and outputs are TTL-compatible
DQ2 12
DQ3 14
Vcc 16
Industry-standard pinout
A7 18
A8 20
FR4-PCB design
A9 22
www.DaLtaoSwhepert4oUfi.lceom72-pin
DQ4 24
DQ5 26
Part identification
DQ6 28
DQ7 30
- HMS1M32M8G : SIMM design, Gold Plate Lead /WE 32
- HMS1M32Z8 : ZIP design
A14 34
/CE1 36
→ The both are pin-to-pin compatible
/CE3 38
A16 40
OPTIONS
MARKING
Vss 42
Timing
DQ16 44
DQ17 46
10ns access
-10
DQ18 48
DQ19 50
12ns access
-12
A10 52
A11 54
15ns access
-15
A12 56
A13 58
17ns access
-17
DQ20 60
20ns access
-20
DQ21 62
DQ22 64
Packages
DQ23 66
Vss 68
72-pin SIMM
M
A19 70
72-pin ZIP
Z
NC 72
1 NC
3 PD2
5 Vss
7 PD1
9 DQ8
11 DQ9
13 DQ10
15 DQ11
17 A0
19 A1
21 A2
23 DQ12
25 DQ13
27 DQ14
29 DQ15
31 Vss
33 A15
35 /CE2
37 /CE4
39 A17
41 /OE
43 DQ24
45 DQ25
47 DQ26
49 DQ27
51 A3
53 A4
55 A5
57 Vcc
59 A6
61 DQ28
63 DQ29
65 DQ30
67 DQ31
69 A18
71 NC
PD0 - Vss
PD1 - Open
PD2 - Vss
PD3 - Open
72-Pin ZIP
TOP VIEW
1 HANBit Electronics Co.,Ltd.
1 page  
HANBit
HMS1M32M8G/Z8
WRITE CYCLE
PARAMETER
SYMBOL
-10
MIN MAX
-12
MIN MAX
-15
UNIT
MIN MAX
Write Cycle Time
tWC 10 - 12 - 15 - ns
Chip Select to End of Write
tCW 7 - 8 - 10 - ns
Address Set-up Time
tAS 0 - 0 - 0 - ns
Address Valid to End of Write
tAW 7 - 8 - 10 - ns
Write Pulse Width (/OE High)
tWP 7 - 8 - 10 - ns
Write Recovery Time
tWR 0 - 0 - 0 - ns
Write to Output High-Z
tWHZ 0 5 0 6 0 7 ns
Data to Write Time Overlap
tDW 5 - 6 - 7 - ns
Data Hold from Write Time
tDH 0 - 0 - 0 - ns
End of Write to Output Low-Z
TIMING DIAGRAMS
tOW 3 - 3 - 3
TIMING WAVEFORM OF READ CYCLE( Address Controlled)( /CE =/OE = VIL , /WE = VIH)
tRC
-
ns
Address
tAA
tOH
Data out
www.DataSheet4U.com
Previous Data Valid
Data Valid
TIMING WAVEFORM OF READ CYCLE ( /WE = VIH )
Address
/CE
/OE
tRC
tAA
tCO
tLZ(4,5)
tOE
Data Out
High-Z
tOLZ
Vcc Supply
Current
lCC
lSB
tPU
50%
Data Valid
tHZ(3,4,5)
tOHZ
tOH
tPD
50%
5 HANBit Electronics Co.,Ltd.
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet HMS1M32M8G.PDF ] | |
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