PDF LG1627BXC Data sheet ( Hoja de datos )

Número de pieza	LG1627BXC
Descripción	LG1627BXC Clocked Laser Driver
Fabricantes	Agere Systems
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No Preview Available ! Data Sheet May 2001 LG1627BXC Clocked Laser Driver Features s High data-rate clocked laser diode driver s Clock disable mode for data feedthrough s Adjustable high output current s Operation up to 3 Gbits/s Applications s SONET/SDH transmission systems s SONET/SDH test equipment s Optical transmitters Functional Description The LG1627BXC is a gallium arsenide (GaAs) laser diode driver to be used with direct modulated laser diodes in high-speed non-return-to-zero (NRZ) trans- mission systems. The device is made in a high- performance 0.9 µm gate GaAs hetero-junction FET technology that utilizes high-density MIM capacitors, airbridge interconnect, and NiCr film precision resis- tors. The driver includes differential data and clock inputs. The high-output, low overshoot drive current and prebias can be set separately. Data retiming is accomplished by the internal flip-flop, minimizing jitter on the data. Clocking can be disabled for data feedthrough. A pulse-width control enables the user to compensate for laser turn-on delay. A 2.5 V band- gap reference is required for stable operation over temperature and varying power supply voltage. Functional Diagram VTH VIN VIN CLK CLK CLK_E MOD_E GND BG2P5 MK MK VPRE IOUT-PRE LG1627BXC VMOD VSS3 VSS2 VSS1 PWN PWP IOUT Figure 1. Functional Diagram 5-6549(F).b 1 page Data Sheet May 2001 LG1627BXC Clocked Laser Driver Electrical Characteristics (TA = 25 °C, VSS1 = VSS2 = VSS3 = –5.2 V, data input = 600 mV (single ended), and RL = 50 Ω) Minimum and maximum values are testing requirements. Typical values are characteristics of the device and are the result of engineering evaluations. Typical values are for information purposes only and are not part of the test- ing requirements. Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. Table 5. Electrical Characteristics Parameter Symbol Data Input Voltage, Single Ended VIN Power Supply Voltage Power Supply Current1 VSS1, VSS2, VSS3 ISS1 Voltage Control for Output Modulation Current VMOD Output Minimum Modulation Current Output Maximum Modulation Current2 IOUT LOW IOUT HIGH Voltage Control for Prebias Current VPRE Output Minimum Prebias Current Output Maximum Prebias Current3 Mark Density, 50% Duty Cycle (1 kΩ to GND) IPRE LOW IPRE HIGH MK Mark Density Complement, 50% Duty Cycle (1 kΩ to GND) MK Pulse Width Adjust Plus PWP Pulse Width Adjust Negative PWN Output Modulation IOUT = 40 mA, Clock Enabled Output Rise and Fall Times (20%—80%) Jitter (rms) Phase Margin tR, tF — — Output Modulation IOUT = 40 mA, Clock Disabled Output Rise and Fall Times (20%—80%) tR, tF Jitter (rms) — Output Modulation IOUT = 80 mA, Clock Enabled Output Rise and Fall Times (20%—80%) Jitter (rms) Phase Margin tR, tF — — Output Modulation IOUT = 80 mA, Clock Disabled Output Rise and Fall Times (20%—80%) tR, tF Jitter (rms) — 1. Excludes IPRE and average IMOD. Power supply current ISS2 (relating to prebias) is dependent on VPRE. Power supply current ISS3 (relating to modulation) is dependent on VMOD. 2. Maximum modulation at maximum VMOD. 3. Maximum prebias at maximum VPRE. Min 300 –4.9 100 –4.0 — 75 –3.0 — 50 — — –3.0 –3.0 — — — — — — — — — — Typ 600 –5.2 140 — 0 85 — 0 60 –0.5 –0.5 –4.2 –4.2 90 4 270 90 6 100 4 270 100 6 Max 1000 –5.5 160 –5.5 2 — –5.5 0.5 — — — –5.5 –5.5 Unit mV V mA V mA mA V mA mA V V V V — ps — ps — deg — ps — ps — ps — ps — deg — ps — ps Agere Systems Inc. 5 5 Page

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