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PDF SA1021 Data sheet ( Hoja de datos )
| Número de pieza | SA1021 | |
| Descripción | FM RADIO RECEIVER | |
| Fabricantes | Silan Microelectronics | |
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SA1021
FM RADIO RECEIVER FOR PORTABLE SYSTEM
DESCRIPTION
The SA1021 integrated radio receiver circuit is for portable radios,
stereo as well as mono, where a minimum of periphery is important in
terms of small dimensions and low cost. It is fully compatible for
applications using the low-voltage micro tuning system (MTS). The IC
has a frequency locked loop (FLL) system with an intermediate
frequency of 76kHz. The selectivity is obtained by active RC filters.
The only function to be tuned is the resonant frequency of the
oscillator.Interstation noise as well as noise from receiving weak
SOP-16-225-1.27
signals is reduced by a correlation mute system.
Special precautions have been taken to meet local oscillator
radiation requirements. Because of the low intermediate frequency,
low pass filtering of the MUX signal is required to avoid noise when
receiving stereo. 50kHz roll-off compensation, needed because of the ORDERING INFORMATION
low pass characteristic of the FLL, is performed by the integrated LF
amplifier. For mono application this amplifier can be used to directly
drive an earphone. The field-strength detector enables field-strength
dependent channel separation control.
Part No.
SA1021
* Mixer
Package
SOP-16-225-1.27
FEATURES
* RF input stage
* Local oscillator
* Frequency detector
* MTS compatible
* IF amplifier/limiter
* Mute circuit
* Loop amplifier
* LF amplifier for mono earphone
amplifier or MUX filter
* Internal reference circuit
* Field-strength dependent channel separation control facility.
www.DataSheet4U.com
BLOCK DIAGRAM
12 13
11 10 7 8
RF
OSC
5
AF
MIX
AMP
Buffer
IF Filter
VCO
MUTE
AMP
CLIM
6
Demodulation IF limiter
STAB
14 16
15 2 1
Fig.1 Block diagram
3
49
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
Http: www.silan.com.cn
REV:2.0 2004.07.31
Page 1 of 7
1 page  
TEST AND APPLICATION CIRCUIT
SA1021
www.DataSheet4U.com
Fig.8: Stereo application in combination with a low voltage PLL stereo decoder (UTC7040) and a low voltage
Mono/stereo power amplifier (UTC7050).
Fig.9 test set-up; Vi=30mV; fi=76kHz; selective voltmeter at output has Ri≥1MΩ and Ci≤8pF; fo=fi.
This test set-up is to incorporate the circuit of Fig.5 for mono operation or the circuit of Fig.8 for stereo operation.
For either circuit, replace the 100µF capacitor at pin 6 with R6(100kΩ) as shown above.
SELECTIVITY
S+300=20 Vo | (300KhZ - fi)
Vo | fi
S-300=20 Vo | (300KhZ + fi)
Vo | fi
HANGZHOU SILAN MICROELECTRONICS CO.,LTD
Http: www.silan.com.cn
REV:2.0 2004.07.31
Page 5 of 7
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet SA1021.PDF ] | |
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