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Número de pieza | AD7626 | |
Descripción | PulSAR Differential ADC | |
Fabricantes | Analog Devices | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de AD7626 (archivo pdf) en la parte inferior de esta página. Total 28 Páginas | ||
No Preview Available ! FEATURES
Throughput: 10 MSPS
SNR: 91.5 dB
16-bit no missing codes
INL: ±0.45 LSB
DNL: ±0.35 LSB
Power dissipation: 136mW
32-lead LFCSP (5 mm × 5 mm)
SAR architecture
No latency/no pipeline delay
16-bit resolution with no missing codes
Zero error: ±1LSB
Differential input range: ±4.096 V
Serial LVDS interface
Self-clocked mode
Echoed-clock mode
LVDS or CMOS option for conversion control (CNV signal)
Reference options
Internal: 4.096 V
External (1.2 V) buffered to 4.096 V
External: 4.096 V
APPLICATIONS
Digital imaging systems
Digital X-ray
Digital MRI
CCD and IR cameras
High speed data acquisition
www.DaHtiagShhdeeytn4aUm.ciocmrange telecommunications receivers
Spectrum analysis
Test equipment
16-Bit, 10 MSPS, PulSAR
Differential ADC
AD7626
FUNCTIONAL BLOCK DIAGRAM
REFIN REF VCM
1.2V
BAND GAP
IN+
IN–
÷2 CLOCK
CAP
DAC
AD7626
SAR
LOGIC
SERIAL
LVDS
VIO
CNV+, CNV–
D+, D–
DCO+, DCO–
CLK+, CLK–
Figure 1.
GENERAL DESCRIPTION
The AD7626 is a 16-bit, 10 MSPS, charge redistribution
successive approximation register (SAR) based architecture
analog-to-digital converter (ADC). SAR architecture allows
unmatched performance both in noise (91.5 dB SNR) and in
linearity (±0.45 LSB INL). The AD7626 contains a high speed,
16-bit sampling ADC, an internal conversion clock, and an
internal buffered reference. On the CNV edge, it samples the
voltage difference between the IN+ and IN− pins. The voltages
on these pins swing in opposite phase between 0 V and REF.
The 4.096 V reference voltage, REF, can be generated internally
or applied externally.
All converted results are available on a single LVDS self-clocked
or echoed-clock serial interface, reducing external hardware
connections.
The AD7626 is housed in a 32-lead, 5 mm × 5 mm LFCSP with
operation specified from −40°C to +85°C.
Table 1. Fast PulSAR® ADC Selection
Input Type
Resolution (Bits)
Differential (Ground Sense)
16
True Bipolar
Differential (Antiphase)
Differential (Antiphase)
16
16
18
1 MSPS to <2 MSPS
AD7653
AD7667
AD7980
AD7983
AD7671
AD7677
AD7623
AD7643
AD7982
AD7984
2 MSPS to 3 MSPS
AD7621
AD7622
AD7641
6 MSPS 10 MSPS
AD7625 AD7626
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.
1 page AD7626
TIMING SPECIFICATIONS
VDD1 = 5 V; VDD2 = 2.5 V; VIO = 2.37 V to 2.63 V; REF = 4.096 V; all specifications TMIN to TMAX, unless otherwise noted.
Table 3.
Parameter
Time Between Conversions1
CNV High Time
CNV to D (MSB) Ready
CNV to Last CLK (LSB) Delay
CLK Period2
CLK Frequency
CLK to DCO Delay (Echoed-Clock Mode)
DCO to D Delay (Echoed-Clock Mode)
CLK to D Delay
Symbol
tCYC
tCNVH
tMSB
tCLKL
tCLK
fCLK
tDCO
tD
tCLKD
Min Typ Max
100 10,000
10 40
100
72
3.33 4
(tCYC − tMSB + tCLKL)/n
250 300
0 47
01
0 47
Unit
ns
ns
ns
ns
ns
MHz
ns
ns
ns
1 The maximum time between conversions is 10,000 ns. If CNV± is left idle for a time greater than the maximum value of tCYC, the subsequent conversion result is invalid.
2 For the maximum CLK period, the window available to read data is tCYC − tMSB + tCLKL. Divide this time by the number of bits (n) to be read giving the maximum CLK±
frequency that can be used for a given conversion CNV frequency. In echoed-clock interface mode, n = 16; in self-clocked interface mode, n = 18.
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Rev. 0 | Page 5 of 28
5 Page 0
–20
–40
INPUT FREQUENCY = 5.00656128MHz
–0.5dB INPUT AMPLITUDE
SNR = 86.7dBFS
SINAD = 83.2dBFS
THD = –85.3dB
SFDR = 86.1dB
64k SAMPLES
–60
–80
–100
–120
SECOND
HARMONIC
FOURTH
HARMONIC
THIRD
HARMONIC
FIFTH
HARMONIC
–140
–160
–180
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
FREQUENCY (MHz)
Figure 11. FFT, 5 MHz, −0.5 dB Input Tone, Wide View
0
–20
–40
INPUT FREQUENCY = 5.00656128MHz
–6dB INPUT AMPLITUDE
SNR = 88.4dBFS
SINAD = 88.0dBFS
THD = –92.4dB
SFDR = 92.8dB
64k SAMPLES
–60
–80
–100
–120
SECOND
HARMONIC
FOURTH
HARMONIC
FUNDAMENTAL
THIRD
HARMONIC
FIFTH
HARMONIC
–140
–160
–180
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
FREQUENCY (MHz)
Figure 12. FFT, 5 MHz, −6 dB Input Tone, Wide View
5.0
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–80 9.7MHz
–85
5MHz
–90
–95
–100
1MHz
–105
–110
–115
–18
2MHz
3MHz
–15 –12
–9
–6
INPUT AMPLITUDE (dBFS)
–3
0
Figure 13. THD vs. Input Amplitudes at Input Frequency Tones of
10 kHz to 9.7 MHz
AD7626
0
–20
–40
INPUT FREQUENCY = 5.00656128MHz
–0.5dB INPUT AMPLITUDE
SNR = 86.7dBFS
SINAD = 83.2dBFS
THD = –85.3dB
SFDR = 86.1dB
64k SAMPLES
–60
–80
–100
FUNDAMENTAL
THIRD
HARMONIC
FIFTH
HARMONIC
–120
–140
–160
–180
4.50 4.55 4.60 4.65 4.70 4.75 4.80 4.85 4.90 4.95 5.00
FREQUENCY (MHz)
Figure 14. FFT, 5 MHz, −0.5 dB Input Tone Zoomed View
0
–20
–40
INPUT FREQUENCY = 5.00656128MHz
–6dB INPUT AMPLITUDE
SNR = 88.4dBFS
SINAD = 88.0dBFS
THD = –92.4dB
SFDR = 92.8dB
64k SAMPLES
–60
–80
–100
FUNDAMENTAL
THIRD
HARMONIC
FIFTH HARMONIC
–120
–140
–160
–180
4.50 4.55 4.60 4.65 4.70 4.75 4.80 4.85 4.90 4.95 5.00
FREQUENCY (MHz)
Figure 15. FFT, 5 MHz, −0.5 dB Input Tone Zoomed View
94 –50
92 –60
90
88 SNR
86
84
–70
–80
–90
82
THD
–100
80
10k
100k
1M
INPUT FREQUENCY (Hz)
–110
10M
Figure 16. THD and SNR vs. Input Frequency (−0.5 dB Input Tone)
Rev. 0 | Page 11 of 28
11 Page |
Páginas | Total 28 Páginas | |
PDF Descargar | [ Datasheet AD7626.PDF ] |
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