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PDF JANSR2N7500U5 Data sheet ( Hoja de datos )

Número de pieza JANSR2N7500U5
Descripción RADIATION HARDENED POWER MOSFET SURFACE MOUNT
Fabricantes International Rectifier 
Logotipo International Rectifier Logotipo



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PD - 94325A
RADIATION HARDENED
POWER MOSFET
SURFACE MOUNT(SMD-2)
Product Summary
Part Number Radiation Level
IRHE57133SE 100K Rads (Si)
RDS(on)
0.13
IRHE57133SE
JANSR2N7500U5
130V, N-CHANNEL
REF: MIL-PRF-19500/707
5 TECHNOLOGY
™
ID QPL Part Number
9.0A JANSR2N7500U5
International Rectifier’s R5TM technology provides
high performance power MOSFETs for space
applications. These devices have been characterized
for Single Event Effects (SEE) with useful performance
up to an LET of 80 (MeV/(mg/cm2)). The combination
of low RDS(on) and low gate charge reduces the
power losses in switching applications such as DC
to DC converters and motor control. These devices
retain all of the well established advantages of
MOSFETs such as voltage control, fast switching,
ease of paralleling and temperature stability of
electrical parameters.
Absolute Maximum Ratings
ID @ VGS = 12V, TC = 25°C
ID @ VGS = 12V, TC = 100°C
IDM
PD @ TC = 25°C
Parameter
Continuous Drain Current
Continuous Drain Current
Pulsed Drain Current À
Max. Power Dissipation
Linear Derating Factor
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Gate-to-Source Voltage
Single Pulse Avalanche Energy Á
Avalanche Current À
Repetitive Avalanche Energy À
Peak Diode Recovery dv/dt Â
Operating Junction
Storage Temperature Range
Pckg. Mounting Surface Temp.
Weight
For footnotes refer to the last page
www.irf.com
LCC-18
Features:
n Single Event Effect (SEE) Hardened
n Ultra Low RDS(on)
n Low Total Gate Charge
n Simple Drive Requirements
n Ease of Paralleling
n Hermetically Sealed
n Surface Mount
n Ceramic Package
n Light Weight
9.0
6.0
36
25
0.2
±20
56
9.0
2.5
6.6
-55 to 150
300 (for 5s)
0.42 (Typical)
Pre-Irradiation
Units
A
W
W/°C
V
mJ
A
mJ
V/ns
oC
g
1
05/06/04

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JANSR2N7500U5 pdf
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Pre-Irradiation
IRHE57133SE, JANSR2N7500U5
2400
2000
1600
1200
800
400
VCCGirsssSs
=
=
=
0V,
CCggsd
+
f = 1MHz
Cgd , Cds
SHORTED
Coss = Cds + Cgd
Ciss
Coss
Crss
0
1 10 100
VDS , Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
20 ID = 9.0A
16
VVVDDDSSS
=
=
=
104V
65V
26V
12
8
4
FOR TEST CIRCUIT
0 SEE FIGURE 13
0 10 20 30 40 50
QG , Total Gate Charge (nC)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
10
TJ = 150° C
TJ = 25° C
1
0.1
0.2
VGS = 0 V
0.6 1.0 1.4 1.8
VSD ,Source-to-Drain Voltage (V)
2.2
Fig 7. Typical Source-Drain Diode
Forward Voltage
www.irf.com
100
OPERATION IN THIS AREA LIMITED
BY RDS(on)
10
100µs
1ms
1
Tc = 25°C
Tj = 150°C
Single Pulse
0.1
1 10
10ms
100
VDS , Drain-toSource Voltage (V)
1000
Fig 8. Maximum Safe Operating Area
5

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