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PDF ADC161S626 Data sheet ( Hoja de datos )
| Número de pieza | ADC161S626 | |
| Descripción | MicroPower ADC | |
| Fabricantes | National Semiconductor | |
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ADC161S626
May 14, 2009
16-Bit, 50 to 250 kSPS, Differential Input, MicroPower ADC
General Description
The ADC161S626 is a 16-bit successive-approximation reg-
ister (SAR) Analog-to-Digital converter (ADC) with a maxi-
mum sampling rate of 250 kSPS. The ADC161S626 has a
minimum signal span accuracy of ± 0.003% over the temper-
ate range of −40°C to +85°C. The converter features a differ-
ential analog input with an excellent common-mode signal
rejection ratio of 85 dB, making the ADC161S626 suitable for
noisy environments.
The ADC161S626 operates with a single analog supply (VA)
and a separate digital input/output (VIO) supply. VA can range
from +4.5V to +5.5V and VIO can range from +2.7V to +5.5V.
This allows a system designer to maximize performance and
minimize power consumption by operating the analog portion
of the ADC at a VA of +5V while interfacing with a +3.3V con-
troller. The serial data output is binary 2's complement and is
SPI™ compatible.
The performance of the ADC161S626 is guaranteed over
temperature at clock rates of 1 MHz to 5 MHz and reference
voltages of +2.5V to +5.5V. The ADC161S626 is available in
a small 10-lead MSOP package. The high accuracy, differ-
ential input, low power consumption, and small size make the
ADC161S626 ideal for direct connection to bridge sensors
and transducers in battery operated systems or remote data
acquisition applications.
Applications
■ Direct Sensor Interface
■ I/O Modules
■ Data Acquisition
■ Portable Systems
■ Motor Control
■ Medical Instruments
■ Instrumentation and Control Systems
Features
■ 16-bit resolution with no missing codes
■ Guaranteed performance from 50 to 250 kSPS
■ ±0.003% signal span accuracy
■ Separate Digital Input/Output Supply
■ True differential input
■ External voltage reference range of +0.5V to VA
■ Zero-Power Track Mode with 0 µsec wake-up delay
■ Wide input common-mode voltage range of 0V to VA
■ SPI™/QSPI™/MICROWIRE™ compatible Serial
Interface
■ Operating temperature range of −40°C to +85°C
■ Small MSOP-10 package
Key Specifications
■ Conversion Rate
■ DNL
■ INL
■ Offset Error Temp Drift
■ Gain Error Temp Drift
■ SNR
■ THD
■ Power Consumption
■ — 10 kSPS, 5V
— 200 kSPS, 5V
— 250 kSPS, 5V
— Power-Down, 5V
50 kSPS to 250 kSPS
+ 0.8 / − 0.5 LSB
± 0.8 LSB
2.5 µV/°C
0.3 ppm/°C
93.2 dBc
− 104 dBc
0.24 mW
5.3 mW
5.8 mW
10 µW
Typical Application
TRI-STATE® is a trademark of National Semiconductor Corporation.
MICROWIRE™ is a trademark of National Semiconductor Corporation.
QSPI™ and SPI™ are trademarks of Motorola, Inc.
© 2009 National Semiconductor Corporation 300734
30073482
www.national.com
1 page  
Symbol
Parameter
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Power Consumption, Power Down
PWR (PD) Mode (CS high)
Conditions
fSCLK = 5 MHz, VA = 5.0V
(Note 8)
fSCLK = 0 Hz, VA = 5.0V
(Note 8)
Min Typ Max Units
35 µW
10 15 µW
PSRR Power Supply Rejection Ratio
See the Specification Definitions for
the test condition
−78
dB
AC ELECTRICAL CHARACTERISTICS
fSCLK
fS
tACQ
tCONV
Maximum Clock Frequency
Maximum Sample Rate
Acquisition/Track Time
Conversion/Hold Time
(Note 10)
1 5 MHz
50 250 kSPS
600 ns
17
SCLK
cycles
tAD Aperture Delay
See the Specification Definitions 6 ns
ADC161S626 Timing Specifications (Note 7)
The following specifications apply for VA = 4.5V to 5.5V, VIO = 2.7V to 5.5V, VREF = 2.5V to 5.5V, fSCLK = 1Mz to 5MHz, and CL =
25 pF, unless otherwise noted. Maximum and minimum values apply for TA = TMIN to TMAX; the typical values are tested at TA =
25°C.
Symbol
Parameter
Min Typ Max
Units
tCSS CS Setup Time prior to an SCLK rising edge
tCSH CS Hold Time after an SCLK rising edge
tDH DOUT Hold Time after an SCLK falling edge
tDA DOUT Access Time after an SCLK falling edge
tDIS DOUT Disable Time after the rising edge of CS (Note 11)
tCS Minimum CS Pulse Width
tEN DOUT Enable Time after the 2nd falling edge of SCLK
tCH SCLK High Time
tCL SCLK Low Time
tr DOUT Rise Time
tf DOUT Fall Time
83
83
6 11
18 41
20 30
20
20 70
20
20
7
7
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test
conditions. Operation of the device beyond the maximum Operating Ratings is not recommended.
Note 2: All voltages are measured with respect to GND = 0V, unless otherwise specified.
Note 3: When the input voltage at any pin exceeds the power supplies (that is, VIN < GND or VIN > VA), the current at that pin should be limited to 10 mA. The 50
mA maximum package input current rating limits the number of pins that can safely exceed the power supplies with an input current of 10 mA to five.
Note 4: The absolute maximum junction temperature (TJmax) for this device is 150°C. The maximum allowable power dissipation is dictated by TJmax, the
junction-to-ambient thermal resistance (θJA), and the ambient temperature (TA), and can be calculated using the formula PDMAX = (TJmax − TA)/θJA. The values
for maximum power dissipation listed above will be reached only when the ADC161S626 is operated in a severe fault condition (e.g. when input or output pins
are driven beyond the power supply voltages, or the power supply polarity is reversed). Such conditions should always be avoided.
Note 5: Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor. Machine model is a 220 pF capacitor discharged through 0 Ω. Charge
device model simulates a pin slowly acquiring charge (such as from a device sliding down the feeder in an automated assembler) then rapidly being discharged.
Note 6: Reflow temperature profiles are different for lead-free packages.
Note 7: Typical values are at TJ = 25°C and represent most likely parametric norms. Test limits are guaranteed to National's AOQL (Average Outgoing Quality
Level).
Note 8: This parameter is guaranteed by design and/or characterization and is not tested in production.
Note 9: The value of VIO is independent of the value of VA. For example, VIO could be operating at 5.5V while VA is operating at 4.5V or VIO could be operating
at 2.7V while VA is operating at 5.5V.
Note 10: While the maximum sample rate is fSCLK / 20, the actual sample rate may be lower than this by having the CS rate slower than fSCLK / 20.
Note 11: tDIS is the time for DOUT to change 10% while being loaded by the Timing Test Circuit.
5 www.national.com
5 Page 
Typical Performance Characteristics
ww+w25.D°Cat,aaSnhdeefItN4U= .2c0omkHz unless otherwise stated.
VA = VIO = VREF = +5V, fSCLK = 5 MHz, fSAMPLE = 250 kSPS, TA =
SINAD vs. TEMPERATURE
THD vs. TEMPERATURE
VA CURRENT vs. VA
30073472
30073471
VA CURRENT vs. SCLK FREQUENCY
30073435
VA CURRENT vs. TEMPERATURE
VREF CURRENT vs. VREF
30073455
30073454
11
30073434
www.national.com
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| Páginas | Total 22 Páginas | |
| PDF Descargar | [ Datasheet ADC161S626.PDF ] | |
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