ADG1633 Datasheet PDF - Analog Devices
| Part Number | ADG1633 | |
| Description | (ADG1633 / ADG1634) +3.3 V Switches | |
| Manufacturers | Analog Devices | |
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4.5 Ω RON, Triple/Quad SPDT ±5 V,
+12 V, +5 V, and +3.3 V Switches
ADG1633/ADG1634
FEATURES
4.5 Ω typical on resistance
1 Ω on-resistance flatness
Up to 206 mA continuous current
±3.3 V to ±8 V dual-supply operation
3.3 V to 16 V single-supply operation
No VL supply required
3 V logic-compatible inputs
Rail-to-rail operation
ADG1633
16-lead TSSOP and 16-lead, 3 mm × 3 mm LFCSP
ADG1634
20-lead TSSOP and 20-lead, 4 mm × 4 mm LFCSP
APPLICATIONS
Communication systems
Medical systems
Audio signal routing
Video signal routing
Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Relay replacements
GENERAL DESCRIPTION
The ADG1633 and ADG1634 are monolithic industrial CMOS
(iCMOS®) analog switches comprising three independently
selectable single-pole, double-throw (SPDT) switches and
four independently selectable SPDT switches, respectively.
All channels exhibit break-before-make switching action that
prevents momentary shorting when switching channels. An
EN input on the ADG1633 (LFCSP and TSSOP packages) and
ADG1634 (LFCSP package only) is used to enable or disable
the devices. When disabled, all channels are switched off.
The ultralow on resistance and on-resistance flatness of these
switches make them ideal solutions for data acquisition and gain
switching applications, where low distortion is critical. iCMOS
construction ensures ultralow power dissipation, making the parts
ideally suited for portable and battery-powered instruments.
FUNCTIONAL BLOCK DIAGRAMS
ADG1633
S1A
D1
S1B
S3B
D3
S2B S3A
D2
S2A
LOGIC
IN1 IN2 IN3 EN
SWITCHES SHOWN FOR
A 1 INPUT LOGIC.
Figure 1. ADG1633 TSSOP and LFCSP_VQ
ADG1634
S1A S4A
D1 D4
S1B S4B
IN1 IN4
IN2 IN3
S2B S3B
D2 D3
S2A S3A
SWITCHES SHOWN FOR
A 1 INPUT LOGIC.
Figure 2. ADG1634 TSSOP
ADG1634
S1A S4A
D1 D4
S1B S4B
S2B S3B
D2 D3
S2A S3A
LOGIC
IN1 IN2 IN3 IN4 EN
SWITCHES SHOWN FOR
A 1 INPUT LOGIC.
Figure 3. ADG1634 LFCSP_VQ
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.
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ADG1633/ADG1634
5 V SINGLE SUPPLY
VDD = 5 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 3.
Parameter
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On-Resistance Match Between Channels (∆RON)
On-Resistance Flatness (RFLAT(ON))
LEAKAGE CURRENTS
Source Off Leakage, IS (Off )
Drain Off Leakage, ID (Off )
Channel On Leakage, ID, IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINL or IINH
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS1
Transition Time, tTRANSITION
tON (EN)
tOFF (EN)
Break-Before-Make Time Delay, tD
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
Total Harmonic Distortion + Noise (THD + N)
−3 dB Bandwidth
CS (Off )
CD (Off )
CD, CS (On)
POWER REQUIREMENTS
IDD
VDD
25°C
8.5
10
0.15
0.3
1.7
2.3
±0.01
±0.1
±0.02
±0.15
±0.02
±0.15
±1
8
199
254
68
90
201
256
57
−5
−64
−64
0.27
104
21
37
62
0.001
−40°C to
+85°C
12.5
0.35
2.7
±1.5
±2
±2
303
102
300
−40°C to
+125°C
0 V to VDD
14
0.4
3
±12
±20
±20
2.0
0.8
±0.1
337
110
333
37
1.0
3.3/16
Unit
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
Ω max
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
nA typ
μA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
% typ
MHz typ
pF typ
pF typ
pF typ
μA typ
μA max
V min/max
Test Conditions/Comments
VS = 0 V to 4.5 V, IS = −10 mA; see Figure 26
VDD = 4.5 V, VSS = 0 V
VS = 0 V to 4.5 V, IS = −10 mA
VS = 0 V to 4.5 V, IS = −10 mA
VDD = 5.5 V, VSS = 0 V
VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 27
VS = 1 V/4.5 V, VD = 4.5 V/1 V; see Figure 27
VS = VD = 1 V or 4.5 V; see Figure 28
VIN = VGND or VDD
RL = 300 Ω, CL = 35 pF
VS = 2.5 V; see Figure 29
RL = 300 Ω, CL = 35 pF
VS = 2.5 V; see Figure 31
RL = 300 Ω, CL = 35 pF
VS = 2.5 V; see Figure 31
RL = 300 Ω, CL = 35 pF
VS1 = VS2 = 2.5 V; see Figure 30
VS = 2.5 V, RS = 0 Ω, CL = 1 nF; see Figure 32
RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 33
RL = 50 Ω, CL = 5 pF, f = 100 kHz; see Figure 35
RL = 110 Ω, f = 20 Hz to 20 kHz, VS = 3.5 V p-p;
see Figure 36
RL = 50 Ω, CL = 5 pF; see Figure 34
VS = 2.5 V, f = 1 MHz
VS = 2.5 V, f = 1 MHz
VS = 2.5 V, f = 1 MHz
VDD = 5.5 V
Digital inputs = 0 V or VDD
1 Guaranteed by design, but not subject to production test.
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