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PDF 74AUP1G09 Data sheet ( Hoja de datos )

Número de pieza 74AUP1G09
Descripción Low-power 2-input AND Gate
Fabricantes NXP Semiconductors 
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74AUP1G09
Low-power 2-input AND gate with open-drain
Rev. 01 — 15 January 2009
Product data sheet
1. General description
The 74AUP1G09 provides the single 2-input AND gate with an open-drain output. The
output of the device is an open-drain and can be connected to other open-drain outputs to
implement active-LOW wired-OR or active-HIGH wired-AND functions.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire VCC range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
VCC range from 0.8 V to 3.6 V.
This device is fully specified for partial Power-down applications using IOFF.
The IOFF circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
2. Features
I Wide supply voltage range from 0.8 V to 3.6 V
I High noise immunity
I Complies with JEDEC standards:
N JESD8-12 (0.8 V to 1.3 V)
N JESD8-11 (0.9 V to 1.65 V)
N JESD8-7 (1.2 V to 1.95 V)
N JESD8-5 (1.8 V to 2.7 V)
N JESD8-B (2.7 V to 3.6 V)
I ESD protection:
N HBM JESD22-A114E exceeds 5000 V
N MM JESD22-A115-A exceeds 200 V
N CDM JESD22-C101C exceeds 1000 V
I Low static power consumption; ICC = 0.9 µA (maximum)
I Latch-up performance exceeds 100 mA per JESD 78 Class II
I Inputs accept voltages up to 3.6 V
I Low noise overshoot and undershoot < 10 % of VCC
I IOFF circuitry provides partial Power-down mode operation
I Multiple package options
I Specified from 40 °C to +85 °C and 40 °C to +125 °C

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74AUP1G09 pdf
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74AUP1G09
Low-power 2-input AND gate with open-drain
Table 7. Static characteristics …continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
VOL LOW-level output voltage
II input leakage current
IOZ OFF-state output current
IOFF
IOFF
ICC
power-off leakage current
additional power-off
leakage current
supply current
ICC
CI
CO
additional supply current
input capacitance
output capacitance
Tamb = 40 °C to +85 °C
VIH HIGH-level input voltage
VIL LOW-level input voltage
VOL LOW-level output voltage
II input leakage current
VI = VIH or VIL
IO = 20 µA; VCC = 0.8 V to 3.6 V
IO = 1.1 mA; VCC = 1.1 V
IO = 1.7 mA; VCC = 1.4 V
IO = 1.9 mA; VCC = 1.65 V
IO = 2.3 mA; VCC = 2.3 V
IO = 3.1 mA; VCC = 2.3 V
IO = 2.7 mA; VCC = 3.0 V
IO = 4.0 mA; VCC = 3.0 V
VI = GND to 3.6 V; VCC = 0 V to 3.6 V
VI = VIH or VIL; VO = 0 V to 3.6 V;
VCC = 3.6 V
VI or VO = 0 V to 3.6 V; VCC = 0 V
VI or VO = 0 V to 3.6 V;
VCC = 0 V to 0.2 V
VI = GND or VCC; IO = 0 A;
VCC = 0.8 V to 3.6 V
VI = VCC 0.6 V; IO = 0 A; VCC = 3.3 V
VCC = 0 V to 3.6 V; VI = GND or VCC
output enabled; VO = GND; VCC = 0 V
output disabled; VO = GND; VCC = 0 V
VCC = 0.8 V
VCC = 0.9 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 0.8 V
VCC = 0.9 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
VI = VIH or VIL
IO = 20 µA; VCC = 0.8 V to 3.6 V
IO = 1.1 mA; VCC = 1.1 V
IO = 1.7 mA; VCC = 1.4 V
IO = 1.9 mA; VCC = 1.65 V
IO = 2.3 mA; VCC = 2.3 V
IO = 3.1 mA; VCC = 2.3 V
IO = 2.7 mA; VCC = 3.0 V
IO = 4.0 mA; VCC = 3.0 V
VI = GND to 3.6 V; VCC = 0 V to 3.6 V
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.7VCC
0.65VCC
1.6
2.0
-
-
-
-
-
-
-
-
-
-
-
-
-
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
-
0.8
1.7
1.1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Max Unit
0.1
0.3VCC
0.31
0.31
0.31
0.44
0.31
0.44
±0.1
±0.1
V
V
V
V
V
V
V
V
µA
µA
±0.2 µA
±0.2 µA
0.5 µA
40 µA
- pF
- pF
- pF
-
-
-
-
0.3VCC
0.35VCC
0.7
0.9
V
V
V
V
V
V
V
V
0.1
0.3VCC
0.37
0.35
0.33
0.45
0.33
0.45
±0.5
V
V
V
V
V
V
V
V
µA
74AUP1G09_1
Product data sheet
Rev. 01 — 15 January 2009
© NXP B.V. 2009. All rights reserved.
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74AUP1G09 arduino
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74AUP1G09
Low-power 2-input AND gate with open-drain
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
L1
e
1
b
23
L
4×
(2)
6
e1
5
e1
4
6× A
(2)
A1
D
SOT886
E
terminal 1
index area
01
DIMENSIONS (mm are the original dimensions)
scale
UNIT
A (1)
max
A1
max
b
D
E
e
mm
0.5
0.04
0.25
0.17
1.5
1.4
1.05
0.95
0.6
e1 L L1
0.5
0.35 0.40
0.27 0.32
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
OUTLINE
VERSION
IEC
REFERENCES
JEDEC
JEITA
SOT886
MO-252
Fig 10. Package outline SOT886 (XSON6)
74AUP1G09_1
Product data sheet
Rev. 01 — 15 January 2009
2 mm
EUROPEAN
PROJECTION
ISSUE DATE
04-07-15
04-07-22
© NXP B.V. 2009. All rights reserved.
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