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PDF LTM9002 Data sheet ( Hoja de datos )
| Número de pieza | LTM9002 | |
| Descripción | 14-Bit Dual-Channel IF/ Baseband Receiver Subsystem | |
| Fabricantes | Linear Technology Corporation | |
| Logotipo |  |
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www.DataSheet4U.com
LTM9002
14-Bit Dual-Channel IF/
Baseband Receiver Subsystem
FEATURES
n Integrated Dual 14-Bit, High-Speed ADC, Passive
Filters and Fixed Gain Differential Amplifiers
n Up to 300MHz IF Range
Lowpass and Bandpass Filter Versions
n Integrated Low Noise, Low Distortion Amplifiers
Fixed Gain: 8dB, 14dB, 20dB or 26dB
50Ω, 200Ω or 400Ω Input Impedance
n Integrated Bypass Capacitance, No External
Components Required
n 66dB SNR Up to 140MHz Input (LTM9002-AA)
n 76dB SFDR Up to 140MHz Input (LTM9002-AA)
n Auxiliary 12-Bit DACs for Gain Adjustment
n Clock Duty Cycle Stabilizer
n Single 3V to 3.3V Supply
n Low Power: 1.3W (665mW/ch.)
n Shutdown and Nap Modes
n 15mm × 11.25mm LGA Package
APPLICATIONS
n Telecommunications
n Direct Conversion Receivers
n Main and Diversity Receivers
n Cellular Base Stations
DESCRIPTION
The LTM®9002 is a 14-bit dual-channel IF receiver sub-
system. Utilizing an integrated system in a package (SiP)
technology, it includes a dual high-speed 14-bit A/D con-
verter, matching network, anti-aliasing filter and two low
noise, differential amplifiers. It is designed for digitizing
wide dynamic range signals with an intermediate frequency
(IF) up to 300MHz. The amplifiers allow either AC- or DC-
coupled input drive. Lowpass or bandpass filter networks
can be implemented with various bandwidths. Contact
Linear Technology regarding customization.
The LTM9002 is perfect for demanding communications
applications, with AC performance that includes 66dB SNR
and 76dB spurious free dynamic range (SFDR). Auxiliary
DACs allow gain balancing between channels.
A single 3V supply allows low power operation. A separate
output supply allows the outputs to drive 0.5V to 3.3V logic.
An optional multiplexer allows both channels to share a
digital output bus. Two single-ended CLK inputs can be
driven together or independently. An optional clock duty
cycle stabilizer allows high performance at full speed for
a wide range of clock duty cycles.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Dual Channel IF Receiver
VCC = 3V
VDD
VREF
MAIN
RF
LO
DIVERSITY
RF
LO
SAW
INA+
INA–
DIFFERENTIAL
AMPLIFIERS
SAW
INB+
INB–
FILTER
DAC
DAC
FILTER
14-BIT
125Msps ADC
14-BIT
125Msps ADC
GND
OVDD
0.5V TO 3.6V
CLKOUT
ADC CLK
SPI
MUX
OF
9002 TA01
OGND
64k Point FFT, fIN = 15MHz, –1dBFS,
SENSE = VDD, Channel A (LTM9002-LA)
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
0
5 10 15 20 25 30
FREQUENCY (MHz)
9002 TA01b
9002f
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LTM9002
DIGITAL INPUTS AND OUTPUTS The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C.
SYMBOL
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
Logic Inputs (AMPSHDN)
VIL
VIH
IIL
IIH
Logic Outputs
Low Level Input Voltage
High Level Input Voltage
Input Low Current
Input High Current
AMPSHDN = 0.8V
AMPSHDN = 2.4V
l 0.8
l 2.4
l 0.5
l 1.4 3
V
V
μA
μA
OVDD = 3V
COZ
ISOURCE
ISINK
Hi-Z Output Capacitance
Output Source Current
Output Sink Current
OE = 3V (Note 6)
VOUT = 0V
VOUT = 3V
3 pF
50 mA
50 mA
VOH
VOL
OVDD = 2.5V
High Level Output Voltage
Low Level Output Voltage
IO = –10μA
IO = –200μA
IO = 10μA
IO = 1.6mA
2.995
l 2.7 2.99
0.005
l 0.09 0.4
V
V
V
V
VOH
VOL
OVDD = 1.8V
VOH
High Level Output Voltage
Low Level Output Voltage
High Level Output Voltage
IO = –200μA
IO = 1.6mA
IO = –200μA
2.49 V
0.09 V
1.79 V
VOL Low Level Output Voltage
IO = 1.6mA
0.1 V
POWER REQUIREMENTS The l denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C. (Note 7)
SYMBOL PARAMETER
CONDITIONS
MIN TYP MAX UNITS
VCC Amplifier and Auxiliary DAC
Operating Supply Range
l 2.85 3.0 3.4
V
VDD
OVDD
ICC
ADC Analog Supply Voltage
Output Supply Voltage
Amplifier
l 2.85 3.0 3.5
l 0.5 3.0 3.6
DAC Powered Up, Both Amplifiers Enabled, LTM9002-AA l
180 207
Both Amplifiers Enabled, LTM9002-LA
l 90 120
V
V
mA
mA
ICC(SHDN) Amplifier Shutdown Supply Current AMPSHDN = 3V, DAC Powered Down
IDD(ADC) ADC Supply Current
LTM9002-AA
LTM9002-LA
PD(SHDN) ADC Shutdown Power (Each Channel) ADCSHDN = AMPSHDN = 3V, OE = 3V, No CLK
PD(NAP) ADC Nap Mode Power (Each Channel) ADCSHDN = AMPSHDN = 3V, OE = 0V, No CLK
0.7 mA
l
263 313
mA
l
140 159
mA
2 mW
15 mW
PD(AMP) Amplifier Power Dissipation
DAC Powered Up, LTM9002-AA
LTM9002-LA
540 mW
270 mW
PD(ADC) ADC Power Dissipation
LTM9002-AA
l
790 939
mW
LTM9002-LA
l
420 477
mW
PD(TOTAL) Total Power Dissipation
fSAMPLE = MAX, LTM9002-AA
fSAMPLE = MAX, LTM9002-LA
1329 mW
690 mW
9002f
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LTM9002
PIN FUNCTIONS
Supply Pins
GND (Pins A1-2, A5-7, B2-4, B6, C2-3, C6, D1-3, D5-7,
D9-10, E5-6, E9-10, F1-2, F5-7, F9-10, G2-3, G6, H2-4,
H6, J1-2, J5-7): ADC Power Ground.
OGND (Pins A12, C9, G9, J12): Output Driver Ground.
OVDD (Pins B12, H12): Positive supply for the ADC output
drivers. The specified operating range is 0.5V to 3.6V. OVDD
is internally bypassed to OGND.
VCC (Pins E3, E4): Amplifier and Auxiliary DAC Power Sup-
ply. The specified operating range is 2.85V to 3.465V. The
voltage on this pin provides power for the amplifier stage
and auxiliary DACs only and is internally bypassed to GND.
Note that LTM9002-LA does not have auxiliary DACs.
VDD (Pins E7, E8): Analog 3V Supply for ADC. The specified
operating range is 2.7V to 3.6V. VDD is internally bypassed
to GND.
Analog Inputs
CLKA (Pin A3): Channel A ADC Clock Input. The input
sample starts on the positive edge.
CLKB (Pin A4): Channel B ADC Clock Input. The input
sample starts on the positive edge.
DNC1 (Pin H5): Do Not Connect. These pins are used for
testing and should not be connected on the PCB. They
should be soldered to unconnected pads and should be
well isolated. The DNC pins connect to the signal path
prior to the ADC inputs; therefore, care should be taken
to keep other signals away from these sensitive nodes.
DNC1 connects near the channel A positive differential
analog input.
DNC2 (Pin G5): Do Not Connect. These pins are used for
testing and should not be connected on the PCB. They
should be soldered to unconnected pads and should be
well isolated. The DNC pins connect to the signal path
prior to the ADC inputs; therefore, care should be taken
to keep other signals away from these sensitive nodes.
DNC2 connects near the channel A negative differential
analog input.
DNC3 (Pin C5): Do Not Connect. These pins are used for
testing and should not be connected on the PCB. They
should be soldered to unconnected pads and should be
well isolated. The DNC pins connect to the signal path
prior to the ADC inputs; therefore, care should be taken
to keep other signals away from these sensitive nodes.
DNC3 connects near the channel B positive differential
analog input.
DNC4 (Pin B5): Do Not Connect. These pins are used for
testing and should not be connected on the PCB. They
should be soldered to unconnected pads and should be
well isolated. The DNC pins connect to the signal path
prior to the ADC inputs; therefore, care should be taken
to keep other signals away from these sensitive nodes.
DNC4 connects near the channel B negative differential
analog input.
DNC5 (Pin G4): Do Not Connect. This pin is used for test-
ing and should not be connected on the PCB. It should
be soldered to an unconnected pad and should be well
isolated. This is a test point for the auxiliary DAC channel A
voltage output.
DNC6 (Pin C4): Do Not Connect. This pin is used for test-
ing and should not be connected on the PCB. It should
be soldered to an unconnected pad and should be well
isolated. This is a test point for the auxiliary DAC channel B
voltage output.
INA– (Pin G1): Channel A Negative (Inverting) Amplifier
Input.
INA+ (Pin H1): Channel A Positive (Noninverting) Am-
plifier Input.
INB– (Pin C1): Channel B Negative (Inverting) Amplifier
Input.
INB+ (Pin B1): Channel B Positive (Noninverting) Am-
plifier Input.
9002f
11
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet LTM9002.PDF ] | |
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